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MA800 bảng dữ liệu(PDF) 10 Page - Monolithic Power Systems |
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MA800 bảng dữ liệu(HTML) 10 Page - Monolithic Power Systems |
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10 / 23 page ![]() MA800 – 8-BIT, DIGITAL ANGLE SENSOR MA800 Rev. 1.02 www.MonolithicPower.com 10 6/15/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. Figure 4: End-of-Shaft Mounting Figure 5 shows an example of sensor and magnet mounting in a contactless switch assembly. A Neodymium alloy magnet is inserted into an aluminum shaft. The air gap between the magnet and the sensor is 1.0mm. The sensor is positioned on the rotation axis with a precision of 0.5mm. Figure 5: Example of Potentiometer-Like Assembly Electrical Mounting and Power Supply Decoupling It is recommended to place a 1µF decoupling capacitor close to the sensor with a low impedance path to GND (see Figure 6). Figure 6: Connection for Supply Decoupling In general, the MagAlpha works well with or without the exposed pad connected to anything. For optimum conditions (electrically, thermally, and mechanically), it is recommended that the exposed pad be connected to ground. Serial Interface The sensor supports the SPI serial interface for angle reading and register programming. Alternatively, the SSI bus can be used for angle reading (programming through SSI is not supported). SPI SPI is a four-wire, synchronous, serial communication interface. The MagAlpha supports SPI Mode 3 and Mode 0 (see Table 1 and Table 2). The SPI Mode (0 or 3) is detected automatically by the sensor and therefore does not require any action from the user. The maximum clock rate supported on SPI is 25MHz. There is no minimum clock rate. Note that real-life data rates depend on the PCB layout quality and signal trace length. See Figure 7 and Table 3 for SPI timing. All commands to the MagAlpha (whether for writing or reading register content) must be transferred through the SPI MOSI pin and must be 16 bits long. See the SPI Communication section on page 12 for details. Table 1: SPI Specification Mode 0 Mode 3 SCLK idle state Low High Data capture On SCLK rising edge Data transmission On SCLK falling edge CS idle state High Data order MSB first Table 2: SPI Standard Mode 0 Mode 3 CPOL 0 1 CPHA 0 1 Data order (DORD) 0 (MSB first) |
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