STM32L433CB datasheet(165/227 Pages) STMICROELECTRONICS

165 / 227 page

DS11449 Rev 7

165/19

STM32L433xx

Electrical characteristics

194

Figure 31. ADC accuracy characteristics

THD

Total

harmonic

distortion

ADC clock frequency ≤

26 MHz,

1.65 V ≤ VDDA = VREF+ ≤

3.6 V,

Voltage scaling Range 2

Single

ended

Fast channel (max speed)

-71

-69

Slow channel (max speed)

-71

-69

Differential

Fast channel (max speed)

-73

-72

Slow channel (max speed)

-73

-72

1. Guaranteed by design.

2. ADC DC accuracy values are measured after internal calibration.

3. ADC accuracy vs. negative Injection Current: Injecting negative current on any analog input pins should be avoided as this

significantly reduces the accuracy of the conversion being performed on another analog input. It is recommended to add a

Schottky diode (pin to ground) to analog pins which may potentially inject negative current.

4. The above table gives the ADC performance in 12-bit mode.

5. The I/O analog switch voltage booster is enable when VDDA < 2.4 V (BOOSTEN = 1 in the SYSCFG_CFGR1 when

VDDA < 2.4 V). It is disable when VDDA ≥ 2.4 V. No oversampling.

Table 81. ADC accuracy - limited test conditions 4(1)(2)(3)(4) (continued)

Sym-

bol

Parameter

Conditions(5)

Min Typ Max Unit

MSv19880V6

(1) Example of an actual transfer curve

(2) Ideal transfer curve

(3) End-point correlation line

n = ADC resolution

ET = total unadjusted error: maximum deviation

between the actual and ideal transfer curves

EO = offset error: maximum deviation between the first

actual transition and the first ideal one

EG = gain error: deviation between the last ideal

transition and the last actual one

ED = differential linearity error: maximum deviation

between actual steps and the ideal one

EL = integral linearity error: maximum deviation between

any actual transition and the end point correlation line

n-1

Output code

VSSA

n-2

n-3

VREF+ (VDDA)

1 LSB ideal

(1)

(2)

(3)

(or

)]

[1LSB =

VDDA

VREF+

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