Rev 1.1, May 25, 2007

Page 12 of 14

SL23EP04

Switching Electrical Characteristics (I-Grade and VDD=2.5V – Cont.)

Unless otherwise stated VDD= 2.5V+/- 10%, CL=15pF and Ambient Temperature range -40 to +85°C

Fout=66.6 MHz and CL=15pF

-

80

160

ps

Cycle-to-Cycle Jitter

(-1 and -2 Versions)

CCJ1

Fout=133.3 MHz and CL=15pF

-

70

140

ps

Fout=66.6 MHz and CL=15pF

-

70

140

ps

Cycle-to-Cycle Jitter

(-1H and -2H Versions)

CCJ2

Fout=166.6 MHz and CL=15pF

-

60

120

ps

PLL Lock Time

tLOCK

From 0.95VDD and valid CLKIN

-

-

1.0

ms

External Components & Design Considerations

Typical Application Schematic

Comments and Recommendations

Decoupling Capacitor: A decoupling capacitor of 0.1 F must be used between VDD and VSS pins. Place the

capacitor on the component side of the PCB as close to the VDD pin as possible. The PCB trace to the VDD pin and

to the GND via should be kept as short as possible. Do not use vias between the decoupling capacitor and the VDD

pin.

Series Termination Resistor: A series termination resistor is recommended if the distance between the output

clocks and the load is over 1 ½ inch. Place the series termination resistors as close to the clock outputs as possible.

Zero Delay and Skew Control: All outputs and CLKIN pins should be loaded with the same load to achieve “Zero

Delay” between the CLKIN and the outputs. The FBK pin is connected to PLL internally on-chip for feedback and

should be connected to one of to output clocks externally. For applications requiring zero input/output delay, the load

at the all output pins including the FBK pin must be the same. If any delay adjustment is required, the capacitance at

the FBK pin could be increased or decreased to increase or decrease the delay between Bank A and B clocks

relative to CLKIN. For minimum pin-to-pin skew, the external load at all the Bank A and B clocks must be the same.

In addition, the rise and fall time of the reference clock at CLKIN pin should be similar to rise and fall times at the

CLKA and CLK B bank outputs.