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Copyright © 2007 Active-Semi, Inc.

ACT4075

Rev PrA, 13-Aug-07

ORDERING INFORMATION

PART NUMBER

TEMPERATURE RANGE

PACKAGE

PINS

PACKING

ACT4075YH

-40°C to 85°C

SOP-8/EP

8

TUBE

ACT4075YH-T

-40°C to 85°C

SOP-8/EP

8

TAPE & REEL

PIN CONFIGURATION

PIN DESCRIPTIONS

PIN NUMBER

PIN NAME

PIN DESCRIPTION

1

BS

Bootstrap. This pin acts as the positive rail for the high-side switch’s gate driver.

Connect a 10nF between this pin and SW.

2

IN

Input Supply. Bypass this pin to G with a low ESR capacitor. See Input Capacitor

in Application Information section.

3

SW

Switch Output. Connect this pin to the switching end of the inductor.

4

G

Ground.

5

FB

Feedback Input. The voltage at this pin is regulated to 1.222V. Connect to the

resistor divider between output and ground to set output voltage.

6

COMP

Compensation Pin. See Compensation Technique in Application Information sec-

tion.

7

EN

Enable Input. When higher than 1.3V, this pin turns the IC on. When lower than

0.7V, this pin turns the IC off. Output voltage is discharged when the IC is off. This

pin has a small internal pull up current to a high level voltage when pin is not con-

nected.

8

N/C

Not Connected.

EP

EP

Exposed Pad shown as dashed box. The exposed thermal pad should be con-

nected to board ground plane and pin 4. The ground plane should include a large

exposed copper pad under the package for thermal dissipation (see package out-

line). The leads and exposed pad should be flush with the board, without offset

from the board surface.

SOP-8/EP

8

7

6

5

1

2

3

4

BS

IN

SW

G

FB

COMP

EN

N/C

ACT4075

EP