TUSB8042AI datasheet(27/64 Pages) TI2

27 / 64 page

8.5 Product ID LSB Register

Figure 8-4. Register Offset 3h

Bit No.

Reset State

Table 8-5. Bit Descriptions – Product ID LSB Register

Bit

Field

Type

Description

7:0

productIdLsb

RO/RW

Product ID LSB. Least significant byte of the product ID assigned by

Texas Instruments and reported in the SuperSpeed Device descriptor.

the default value of this register is 40h representing the LSB of the

SuperSpeed product ID assigned by Texas Instruments The value

reported in the USB 2.0 Device descriptor is the value of this register

bit wise XORed with 00000010b. The value can be overwritten to

indicate a customer product ID.

Value used for this field is the non-zero value written by EEPROM/

SMBus to both PID and VID. If a zero value is written by EEPROM/

SMbus to both PID and VID, then value used for this field is the non-

zero value from OTP. If a zero value is written by OTP, then value used

for this field is 40h .

8.6 Product ID MSB Register

Figure 8-5. Register Offset 4h

Bit No.

Reset State

Table 8-6. Bit Descriptions – Product ID MSB Register

Bit

Field

Type

Description

7:0

productIdMsb

RO/RW

Product ID MSB. Most significant byte of the product ID assigned by

Texas Instruments; the default value of this register is 82h representing

the MSB of the product ID assigned by Texas Instruments. The value

can be overwritten to indicate a customer product ID.

Value used for this field is the non-zero value written by EEPROM/

SMBus to both PID and VID. If a zero value is written by EEPROM/

SMbus to both PID and VID, then value used for this field is the non-

zero value from OTP. If a zero value is written by OTP, then value used

for this field is 82h.

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TUSB8042A

SLLSF93A – JUNE 2019 – REVISED JANUARY 2025

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