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TUSB7320 bảng dữ liệu(PDF) 44 Page - Texas Instruments |
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TUSB7320 bảng dữ liệu(HTML) 44 Page - Texas Instruments |
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44 / 122 page ![]() 8.1.15 Subsystem Vendor ID Register This register, which is used for system and option card identification purposes, may be required for certain operating systems. This read-only register is a direct reflection of the Subsystem Access register, which is read/ write and is initialized through the EEPROM (if present) or can be written through the Subsystem Alias Register at PCI Offset D0h. PCI register offset: 2Ch Register type: Read-only Default value: 0000h Table 8-22. PCI Register 2Ch Bit No. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reset State 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8.1.16 Subsystem ID Register This register, which is used for system and option card identification purposes, may be required for certain operating systems. This read-only register is a direct reflection of the Subsystem Access register, which is read/ write and is initialized through the EEPROM (if present) or can be written through the Subsystem Alias Register at PCI Offset D0h. PCI register offset: 2Eh Register type: Read-only Default value: 0000h Table 8-23. PCI Register 2Eh Bit No. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reset State 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8.1.17 Capabilities Pointer Register This read-only register provides a pointer into the PCI configuration header where the PCI power management block resides. Because the PCI power management registers begin at 40h, this register is hardwired to 40h. PCI register offset: 34h Register type: Read-only Default value: 40h Table 8-24. PCI Register 34h Bit No. 7 6 5 4 3 2 1 0 Reset State 0 1 0 0 0 0 0 0 TUSB7320, TUSB7340 SLLSE76Q – MARCH 2011 – REVISED MARCH 2024 www.ti.com 44 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: TUSB7320 TUSB7340 |
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