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TPS54821 bảng dữ liệu(PDF) 6 Page - Texas Instruments |
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TPS54821 bảng dữ liệu(HTML) 6 Page - Texas Instruments |
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6 / 42 page ![]() 6 TPS54821 SLVSB14B – OCTOBER 2011 – REVISED FEBRUARY 2016 www.ti.com Product Folder Links: TPS54821 Submit Documentation Feedback Copyright © 2011–2016, Texas Instruments Incorporated Electrical Characteristics (continued) TJ = –40°C to 125°C, VIN = 4.5V to 17V, PVIN = 1.6V to 17V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT CURRENT LIMIT High-side switch current limit threshold 10.5 14.5 17 A Low-side switch sourcing current limit 9.5 11.5 15 A Low-side switch sinking current limit 2 3 4 A Hiccup wait time 512 Cycles Hiccup time before re-start 16384 Cycles THERMAL SHUTDOWN Thermal shutdown 160 175 °C Thermal shutdown hysteresis 10 °C Thermal shutdown hiccup time 16384 Cycles TIMING RESISTOR AND EXTERNAL CLOCK (RT/CLK PIN) Minimum switching frequency Rrt = 240 k Ω (1%) 160 200 240 kHz Switching frequency Rrt = 100 k Ω (1%) 400 480 560 kHz Maximum switching frequency Rrt = 29 k Ω (1%) 1440 1600 1760 kHz Minimum pulse width 20 ns RT/CLK high threshold 2 V RT/CLK low threshold 0.78 V RT/CLK falling edge to PH rising edge delay Measure at 500 kHz with RT resistor in series 66 ns Switching frequency range (RT mode set point and PLL mode) 200 1600 kHz PH (PH PIN) Minimum on time Measured at 90% to 90% of VIN, 25°C, IPH = 2A 94 145 ns Minimum off time BOOT-PH ≥ 3 V 0 ns BOOT (BOOT PIN) BOOT-PH UVLO 2.1 3 V SLOW START AND TRACKING (SS/TR PIN) SS charge current 2.3 μA SS/TR to VSENSE matching V(SS/TR) = 0.4 V 20 60 mV POWER GOOD (PWRGD PIN) VSENSE threshold VSENSE falling (Fault) 92 % Vref VSENSE rising (Good) 94 % Vref VSENSE rising (Fault) 106 % Vref VSENSE falling (Good) 104 % Vref Output high leakage VSENSE = Vref, V(PWRGD) = 5.5 V 30 100 nA Output low I(PWRGD) = 2 mA 0.3 V Minimum VIN for valid output V(PWRGD) < 0.5V at 100 μA 0.6 1 V Minimum SS/TR voltage for PWRGD 1.4 V |
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