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ADPL12008 bảng dữ liệu(PDF) 13 Page - Analog Devices

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ADPL12008 bảng dữ liệu(HTML) 13 Page - Analog Devices

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ADPL12008/ADPL12010
20V, 8A/10A Fully Integrated Buck Converter
with 20μA Quiescent Current and Dual-Phase
Capability
www.analog.com
Analog Devices | 13
Low-IQ Operation in Dual-Phase
The ADPL12008/ADPL12010 ICs feature dual-phase capability, allowing each IC to be configured as either a controller
or a target. The SYNCOUT pin of the controller outputs a 180° out-of-phase clock when SYNC is tied high (FPWM mode).
For low-IQ mode, pull the SYNC pin of the controller low (skip-mode). In this mode, there is no clock present on the
SYNCOUT pin of the controller, and the controller IC enters the skip-mode. The internal circuit of the target IC remains
ON during this time and actively looks for the SYNCOUT signal from the controller. As the target IC is ON, the quiescent
current is slightly higher, even though both the ICs skip pulses.
To improve the light-load efficiency and further reduce the IQ, pull the target EN low. This disables the target and its
internal circuits, which further reduces the IQ. Table 1 summarizes the truth table for low-IQ operation.
Table 1. Configurations for Low-IQ Operation
CONTROLLER
TARGET
MODE
EN = High, SYNC = BIAS
EN = High
FPWM (high IQ)
EN = High, SYNC = Low
EN = High
Skip-mode (low IQ)
EN = High, SYNC = Low
EN = Low
Standby-mode (ultra-low IQ)
EN = Low
EN = High
Not allowed



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