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MP3924 bảng dữ liệu(PDF) 6 Page - Monolithic Power Systems |
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MP3924 bảng dữ liệu(HTML) 6 Page - Monolithic Power Systems |
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6 / 56 page ![]() MP3924 – QUAD-PORT IEEE 802.3AF/AT PSE CONTROLLER MP3924 Rev. 1.0 MonolithicPower.com 6 7/16/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. ABSOLUTE MAXIMUM RATINGS (1) VIN .............................................. -0.3V to +80V OUT1~4................................-0.3V to VIN + 0.3V GATE1~4, SENSE1~4................. -0.3V to +22V DGND, SGND1, SGND2............. -0.3V to +0.3V All other pins............................... -0.3V to +6.5V INT1, INT2, SDAO maximum sink current……... ………………………………………………..20mA Continuous power dissipation (TA = 25°C) …………………………………………...3.9W (2) (4) Junction temperature ............................... 150°C Lead temperature .................................... 260°C Storage temperature................ -65°C to +150°C Recommended Operating Conditions (3) Supply voltage (VIN) ......................... 44V to 57V INT1, INT2, SDAO maximum sink current……... …………………………………………………5mA Operating junction temp (TJ). ... -40°C to +125°C Thermal Resistance θJA θJC EV3924-U-00A (4) ................. 32......... 2.. °C/W JESD51-7 (5) ......................... 36......... 8.. °C/W Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature, TJ (MAX), the junction-to- ambient thermal resistance, θ JA, and the ambient temperature, TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX) - TA) / θJA. Exceeding the maximum allowable power dissipation can cause excessive die temperature, and the regulator may go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on EV3924-U-00A, 2-layer, 88mmx106mm PCB. 5) The value of θ JA given in this table is only valid for comparison with other packages and cannot be used for design purposes. These values were calculated in accordance with JESD51-7, and simulated on a specified JEDEC board. They do not represent the performance obtained in an actual application. |
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