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IS25LE01G-RILA3 bảng dữ liệu(PDF) 148 Page - Integrated Silicon Solution, Inc

tên linh kiện IS25LE01G-RILA3
Giải thích chi tiết về linh kiện  SERIAL FLASH MEMORY 133/104MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC
PDF  186 Pages
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nhà sản xuất  ISSI [Integrated Silicon Solution, Inc]
Trang chủ  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LE01G-RILA3 bảng dữ liệu(HTML) 148 Page - Integrated Silicon Solution, Inc

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IS25LE01G
IS25WE01G
Integrated Silicon Solution, Inc.- www.issi.com
148
Rev. A6
01/14/2025
8.50 READ DYB OPERATION (RDDYB, FAh or 4RDDYB, E0h)
FAh (EXTADD=0) is followed by a 3-byte address (A23-A0) or
• FAh (EXTADD=1) is followed by a 4-byte address (A31-A0) or
• E0h is followed by a 4-byte address (A31-A0)
The instruction is used to read Dynamic Protection Bit (DYB) status of the given sector/block. The instruction code
is entered first, followed by the 24-bit or 32-bit address selecting location zero within the desired sector/block as
above. Then the 8-bit DYB access register contents are shifted out. Each bit (SPI) is shifted out at the SCK
frequency by the falling edge of the SCK signal. It is possible to read the same DYB access register continuously
by providing multiples of eight bits. The address of the DYB register does not increment so this is not a means to
read the entire DYB array. Each location must be read with a separate Read DYB instruction.
Note: Data must be either 00h (protected) or FFh (unprotected).
Figure 8.110 Read DYB Sequence In SPI Mode (FAh [EXTADD=0], 3-byte address)
Instruction = FAh
CE #
SCK
SI
SO
0
1
...
7
8
9
...
31
32
33
34
35
36
37
38
39
Mode 3
Mode 0
3-byte Address
tV
7
3
2
1
0
6
5
4



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