UCD3138A64 datasheet(40/84 Pages) TI2

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tCSS

tWH

tWL

tCSH

tSU

VALID IN

VALID OUT

SCS

SCK

MISO

MOSI

tHO

PSCK

Period SCK

2 ICLK

tWH

SCK High Time

1/2 PSCK

tWL

SCK Low Time

1/2 PSCK

tSU

Data in setup

2 ns (typical)

Data in hold

4 ns (typical)

Ouput Valid

4 ns (typical)

tHO

Ouput Data Hold

2 ns (typical)

tCSS

Chip Select Setup

1 PSCK

tCSH

Chip Select Hold

1 PSCK

UCD3138128, UCD3138A64

SLUSBZ8B – JUNE 2014 – REVISED FEBRUARY 2017

www.ti.com

Product Folder Links: UCD3138128 UCD3138A64

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Figure 25. SPI Timing Diagram

9.3.7 Real Time Clock

The UCD3138x has an internal real time clock (RTC) function that can track time in seconds, minutes, hours and

days. This function requires an external precision 10 MHz clock.

•

Firmware writable time/day register which tracks the total number of days.

–

The day counter will be able to count 4 years worth of days.

–

Years and months and leap year calculation must be calculated in firmware.

•

Firmware programmable frequency correction of ±200 ppm in 0.8 ppm steps

•

The RTC function can provide interrupts to the IRQ or FIQ at 1, 10, 30, and 60 second intervals.

•

The clock from the RTC driver can be driven to an external pin through an internal multiplexor

•

The clock for the RTC function can come from an external clock through a dedicated GPIO pin.

9.3.8 Timers

External to the Digital Power Peripherals there are 3 different types of timers in UCD3138x. They are the 24-bit

timer, 16-bit timer and the watchdog timer

9.3.8.1 24-Bit Timer

There is one 24 bit timer which runs off the Interface Clock. It can be used to measure the time between two

events, and to generate interrupts after a specific interval. Its clock can be divided down by an 8-bit pre-scalar to

provide longer intervals. The timer has two compare registers (Data Registers). Both can be used to generate an

interrupt after a time interval. . Additionally, the timer has a shadow register (Data Buffer register) which can be

used to store CPU updates of the compare events while still using the timer. The selected shadow register

update mode happens after the compare event matches.

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