12

ICS844256BG REV. B NOVEMBER 19, 2007

ICS844256

FEMTOCLOCKS™ CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER

PRELIMINARY

This section provides information on power dissipation and junction temperature for the ICS844256.

Equations and example calculations are also provided.

1. Power Dissipation.

The total power dissipation for the ICS844256 is the sum of the core power plus the power dissipated in the load(s).

The following is the power dissipation for V

DD

= 3.3V + 5% = 3.465V, which gives worst case results.

•

Power (core)

MAX

= V

DD_MAX

* (I

DD_MAX

+ I

DDA_MAX

) = 3.465V * (132mA + 8mA) = 485.1mW

•

Power (outputs)

MAX

= V

DDO_MAX

* I

DDO_MAX

= 3.465V * 120mA = 415.8mW

Total Power

_MAX

= 485.1mW + 415.8mW = 900.9mW

2.

Junction Temperature.

Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the

device. The maximum recommended junction temperature for HiPerClockS

The equation for Tj is as follows: Tj =

θ

Tj = Junction Temperature

θ

Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)

T

In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance

θ

flow and a multi-layer board, the appropriate value is 32.1°C/W per Table 7 below.

Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:

70°C + 0.901W * 32.1°C/W = 98.9°C. This is well below the limit of 125°C.

This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow, and

the type of board (single layer or multi-layer).

θθθθθ

JA

FOR

θθθθθ

JA

by Velocity (Meters per Second)

0

1

2.5

Multi-Layer PCB, JEDEC Standard Test Boards

32.1°C/W

25.5°C/W

2

4.0°C/W