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PM8805 bảng dữ liệu(PDF) 18 Page - STMicroelectronics |
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PM8805 bảng dữ liệu(HTML) 18 Page - STMicroelectronics |
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18 / 45 page ![]() PM8805 overview PM8805 18/45 DS12813 Rev 1 Figure 4. DET internal circuitry 4.2 Boot and reset When the voltage at the input rises above about Voff_det (11.5 V typ.), the PM8805 turns on its internal circuitries (bandgap reference, bias reference, regulators and control logic) and enters into the so-called mark range, waiting for the voltage entering into the Classification range. When the voltage falls below Vrst_cls (5.2 V typ.), the PM8805 turns off its control logic and analog circuitries and turns the detection circuitry on again, resetting the results of previous classifications. The current consumption when VDD is in the mark range (IDD_mark) acts as a pull-down of the input voltage and allows a fast reset of the control logic if the cable is disconnected. 4.3 PoE classification The classification allows the PSE-PD mutual identification, and it is used by PSE to allocate the power to the PD. The PD also understands which type of PSE is connected, and adapts its behavior accordingly. PM8805 complies with both IEEE802.3-2015 1-event and 2-event classification schemes, and is also capable of multiple event-classification as specified by IEEE802.3bt. 1-event classification in IEEE802.3-2015 is performed by Type1 PSEs capable of powering PDs up to 12.95 W. They can be classified into 4 classes (class 0 to class 3). 2-event classification is performed by Type2 PSEs and class 4 identifies Type2 PDs requiring up to 25.5 W. |
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