Pins description and configuration

PM8804

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DocID031629 Rev 1

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Pins description and configuration

Figure 3. Pins configuration (top view)

Table 2. Pin description

Pin no.

Name

Function

1AGND

Analog signal GND.

GND for all the sensitive analog circuitries. It must be connected to the PGND in a star ground

configuration: a single connection point close to pin 10.

2SS

Soft-start set.

A capacitor connected from this pin to AGND sets the converter soft-start time. Use of stable

ceramic capacitors is recommended.

3DT

Delay time set.

A resistor connected from this pin to AGND sets the delay time between GAT1 and GAT2 in the

range 10 ns to 200 ns. This pin cannot be left open

4FSW

Switching frequency set.An external resistor connected from FSW to AGND can set the

oscillator frequency in the range 100 kHz to 1 MHz.

5, 7

NC

Not connected pin.

On layout leave this pin unconnected; in this way this increases the creepage distance

between VIN and PGD pins and the other device pins.

6PGD

Power Good, active high signal.

A low to high transition enable converter operation, typically a startup sequence. In case the

PGD signal is de-asserted during normal operation, at the high to low transition the converter

operation is stopped and both GAT1 and GAT2 signals are frozen in their default level state.

8VIN

High-voltage input pin. Typically in PoE applications this voltage is the rectified voltage of input

bridges and it is referred to AGND.

9GAT1

Main gate driver output of the PWM controller.

DC-DC converter gate driver output with 1 A peak sink -0.8 A source current capability. (5



typ. MOSFETs).