PCM1795DB datasheet(20/68 Pages) TI2

20 / 68 page

OUTPUTCURRENTvsINPUTCODE

OUT

InputCode(Hex)

80000000( FS)

000000(BPZ)

7FFFFFFF(+FS)

PCM1795

SLES248A – MAY 2009 – REVISED MARCH 2015

www.ti.com

7.3.1.3 External Digital Filter Interface and Timing

The PCM1795 device supports an external digital filter interface that consists of a three- or four-wire

synchronous serial port that allows the use of an external digital filter. External filters include the Texas

Instruments’ DF1704 and DF1706, the Pacific Microsonics PMD200, or a programmable digital signal processor.

In the external DF mode, LRCK (pin 4), BCK (pin 6) and DATA (pin 5) are defined as: WDCK, the word clock;

BCK, the bit clock; and DATA, the monaural data. The external digital filter interface is selected by using the

DFTH bit of control register 20, which functions to bypass the internal digital filter of the PCM1795 device .

When the DFMS bit of control register 19 is set, the PCM1795 device can process stereo data. In this case,

ZEROL (pin 1) and ZEROR (pin 2) are defined as left-channel data and right-channel data input, respectively.

Detailed information for the external digital filter interface mode is provided in Application For External Digital

Filter Interface.

7.3.1.4 Direct Stream Digital (DSD) Format Interface and Timing

The PCM1795 device supports the DSD format interface operation, which includes out-of-band noise filtering

using an internal analog FIR filter. For DSD operation, SCK (pin 7) is redefined as BCK, DATA (pin 5) as DATAL

(left channel audio data), and LRCK (pin 4) as DATAR (right channel audio data). BCK (pin 6) must be forced

low in the DSD mode. The DSD format interface is activated by setting the DSD bit of control register 20.

Detailed information for the DSD mode is provided in Application For DSD Format (DSD Mode) Interface.

7.3.1.5 TDMCA Interface

The PCM1795 device supports the time-division-multiplexed command and audio (TDMCA) data format to

enable control of and communication with a number of external devices over a single serial interface.

Detailed information for the TDMCA format is provided in TDMCA Interface Format.

7.3.1.6 Analog Output

Table 2 and Figure 38 show the relationship between the digital input code and analog output.

Table 2. Analog Output Current and Voltage(1)

PARAMETER

800000 (–FS)

000000 (BPZ)

7FFFFF (+FS)

IOUTN (mA)

–1.5

–3.5

–5.5

IOUTP (mA)

–5.5

3.5

–1.5

VOUTN (V)

–1.23

–2.87

–4.51

VOUTP (V)

–4.51

–2.87

–1.23

VOUT (V)

–2.91

2.91

(1)

VOUTN is the output of U1, VOUTP is the output of U2, and VOUT is the output of U3 in the measurement circuit of Figure 53.

Figure 38. Relationship Between Digital Input and Analog Output

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