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S-1155 bảng dữ liệu(PDF) 13 Page - Seiko Instruments Inc

tên linh kiện S-1155
Giải thích chi tiết về linh kiện  HIGH RIPPLE-REJECTION LOW DROPOUT HIGH OUTPUT CURRENT CMOS VOLTAGE REGULATOR
PDF  28 Pages
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nhà sản xuất  SII [Seiko Instruments Inc]
Trang chủ  http://www.sii.co.jp
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S-1155 bảng dữ liệu(HTML) 13 Page - Seiko Instruments Inc

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HIGH RIPPLE-REJECTION LOW DROPOUT HIGH OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.1.1_00
S-1155 Series
Seiko Instruments Inc.
13
Operation
1. Basic operation
Figure 11
shows the block diagram of the S-1155 Series.
The error amplifier compares the reference voltage (Vref) with Vfb, which is the output voltage resistance-divided by
feedback resistors Rs and Rf. It supplies the gate voltage necessary to maintain the constant output voltage which
is not influenced by the input voltage and temperature change, to the output transistor.
VOUT
*1
VSS
VIN
Rs
Rf
Error amplifier
Current
supply
Vref
Vfb
−
+
Reference voltage
circuit
*1.
Parasitic diode
Figure 11
2. Output transistor
In the S-1155 Series, a low on-resistance P-channel MOS FET is used as the output transistor.
Be sure that VOUT does not exceed VIN
+ 0.3 V to prevent the voltage regulator from being damaged due to inverse
current which flows, because of a parasitic diode between the VIN and VOUT pin, when the potential of VOUT
became higher than VIN.



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