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LP5569ARTWR bảng dữ liệu(PDF) 48 Page - Texas Instruments

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LP5569ARTWR bảng dữ liệu(HTML) 48 Page - Texas Instruments

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LP5569
SNVSAP8A – JULY 2017 – REVISED SEPTEMBER 2017
www.ti.com
Product Folder Links: LP5569
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
Table 27. LED8_CONTROL Register Field Descriptions (continued)
Bit
Field
Type
Reset
Description
3
exp_en8
R/W
0h
0 = Linear adjustment (default)
1 = Exponential adjustment
This bit is effective for both the program execution engine control
and direct PWM control.
2
external_power8
R/W
0h
0 = LED is powered by charge pump (default)
1 = LED is powered by external power source
1–0
RESERVED
R/W
0h
8.6.1.13 LED0_PWM Register (Address = 16h) [reset = 0h]
LED0_PWM is shown in Figure 39 and described in Table 28.
Return to Summary Table.
LED0 PWM Register
This is the PWM duty cycle control for the LED0 output.
Figure 39. LED0_PWM Register
7
6
5
4
3
2
1
0
pwm0
R/W-0h
Table 28. LED0_PWM Register Field Descriptions
Bit
Field
Type
Reset
Description
7–0
pwm0
R/W
0h
00h = 0% duty cycle (default)
...
80h = 50% duty cycle
...
FFh = 100% duty cycle
8.6.1.14 LED1_PWM Register (Address = 17h) [reset = 0h]
LED1_PWM is shown in Figure 40 and described in Table 29.
Return to Summary Table.
LED1 PWM Register
This is the PWM duty cycle control for the LED1 output.
Figure 40. LED1_PWM Register
7
6
5
4
3
2
1
0
pwm1
R/W-0h
Table 29. LED1_PWM Register Field Descriptions
Bit
Field
Type
Reset
Description
7–0
pwm1
R/W
0h
00h = 0% duty cycle (default)
...
80h = 50% duty cycle
...
FFh = 100% duty cycle



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