LP55231 datasheet(29/59 Pages) TI2

29 / 59 page

LP55231

www.ti.com

SNOSCR5D – MARCH 2013 – REVISED DECEMBER 2016

Product Folder Links: LP55231

Submit Documentation Feedback

Program start address can be programmed to the Program Counter (PC) register. The Program Counter is

reset to zero when the PC’s upper limit value is reached.

•

Halt: Instruction execution aborts immediately and engine operation halts.

•

01 — Bit [5:4] ENGINE1_MODE

•

00 = disabled.

•

01 = load program to SRAM, reset engine 1 PC.

•

10 = run program as defined by ENGINE1_EXEC bits.

•

11 = halts the engine.

•

01 — Bits [3:2] ENGINE2_MODE

•

00 = disabled.

•

01 = load program to SRAM, reset engine 2 PC.

•

10 = run program as defined by ENGINE2_EXEC bits.

•

11 = halts the engine.

•

01 — Bits [3:2] ENGINE3_MODE

•

00 = disabled.

•

01 = load program to SRAM, reset engine 3 PC.

•

10 = run program as defined by ENGINE3_EXEC bits.

•

11 = halts the engine.

02 OUTPUT DIRECT/RATIOMETRIC MSB

•

A particular feature of the LP55231 is the ratiometric up/down dimming of the RGB-LEDs. In other words, the

LED driver PWM output varies in a ratiometric manner. By a ratiometric approach the emitted color of an

RGB–LED remains the same regardless of the initial magnitudes of the R/G/B PWM outputs. For example, if

the PWM output of the red LED output is doubled, the output of green LED is doubled also.

•

02 — Bit [0] D9_RATIO_EN

•

1 = enables ratiometric diming for D9 output.

•

0 = disables ratiometric dimming for D9 output.

03 OUTPUT DIRECT/RATIOMETRIC LSB

•

03 — Bit [7] D8_RATIO_EN

•

1 = enables ratiometric diming for D8 output.

•

0 = disables ratiometric dimming for D8 output.

•

03 — Bit [0] D1_RATIO_EN to Bit [6] D7_RATIO_EN

•

The options for D1 output to D7 output are the same as above — see the “03 — Bit [7]” section.

04 OUTPUT ON/OFF CONTROL MSB

•

04 — Bit [0] D9_ON

•

1 = D9 output ON.

•

0 = D9 output OFF.

•

Note: Engine mapping overrides this control.

05 OUTPUT ON/OFF CONTROL MSB

•

05 — Bit [7] D8_ON

•

1 = D8 output ON.

•

0 = D8 output OFF.

•

Note: Engine mapping over rides this control.

•

05 — Bit [0] D1_ON to Bit [6] D7_ON

•

The options for D1 output to D7 output are the same as above — see the “05 — Bit [7]” section.

06 D1 CONTROL

•

This is the register used to assign the D1 output to the MASTER FADER group 1, 2, or 3, or none of them.

Also, this register sets the correction factor for the D1 output temperature compensation and selects between

linear and logarithmic PWM brightness adjustment. By using logarithmic PWM-scale the visual effect looks

like linear. When the logarithmic adjustment is enabled, the chip handles internal PWM values with 12-bit

resolution. This allows very fine-grained PWM control at low PWM duty cycles.

LP55231 bảng dữ liệu(PDF) 29 Page - Texas Instruments

LP55231 bảng dữ liệu(HTML) 29 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59

bảng dữ liệu tải về

Link URL