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SPC574K70E7 bảng dữ liệu(PDF) 21 Page - STMicroelectronics |
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SPC574K70E7 bảng dữ liệu(HTML) 21 Page - STMicroelectronics |
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21 / 160 page ![]() DocID023601 Rev 6 21/160 SPC574Kx Package pinouts and signal descriptions 159 Differential DSPI 2 PD[3] SCK_N Differential DSPI 2 Clock, LVDS Negative Terminal O 128 156 PD[2] SCK_P Differential DSPI 2 Clock, LVDS Positive Terminal O 129 157 PD[1] SOUT_N Differential DSPI 2 Serial Output, LVDS Negative Terminal O 130 158 PD[0] SOUT_P Differential DSPI 2 Serial Output, LVDS Positive Terminal O 131 159 PF[13] SIN_N Differential DSPI 2 Serial Input, LVDS Negative Terminal I 84 107 PD[7] SIN_P Differential DSPI 2 Serial Input, LVDS Positive Terminal I 85 108 Differential DSPI 5 PF[9] SCK_N Differential DSPI 5 Clock, LVDS Negative Terminal O74 95 PF[10] SCK_P Differential DSPI 5 Clock, LVDS Positive Terminal O75 96 PF[11] SOUT_N Differential DSPI 5 Serial Output, LVDS Negative Terminal O76 97 PF[12] SOUT_P Differential DSPI 5 Serial Output, LVDS Positive Terminal O77 98 PF[13] SIN_N Differential DSPI 5 Serial Input, LVDS Negative Terminal I 84 107 PD[7] SIN_P Differential DSPI 5 Serial Input, LVDS Positive Terminal I 85 108 1. DRCLK and TCK/DRCLK usage for SIPI LFAST and Debug LFAST are described in the SPC574Kxx reference manual, refer to SIPI LFAST and Debug LFAST chapters. 2. Pads use special enable signal from DCI block: DCI driven enable for Debug LFAST pads is transparent to user. Table 4. LVDSM pin descriptions(Continued) Functional block Port pin Signal Signal description Direction Package pin number eTQFP144, FQ172 eLQFP176, FQ216 |
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