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LM324BAIPWR bảng dữ liệu(PDF) 26 Page - Texas Instruments |
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LM324BAIPWR bảng dữ liệu(HTML) 26 Page - Texas Instruments |
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26 / 65 page  9.4 Layout 9.4.1 Layout Guidelines For best operational performance of the device, use good PCB layout practices, including: • Noise is able to propagate into analog circuitry through the power pins of the circuit as a whole, as well as the operational amplifier. Use bypass capacitors to reduce the coupled noise by providing low-impedance power sources local to the analog circuitry. – Connect low-ESR, 0.1μF ceramic bypass capacitors between each supply pin and ground, placed as close to the device as possible. A single bypass capacitor from V+ to ground is applicable for single supply applications. • Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective methods of noise suppression. One or more layers on multilayer PCBs are typically devoted to ground planes. A ground plane helps distribute heat and reduces EMI noise pickup. Physically separate digital and analog grounds, paying attention to the flow of the ground current. • To reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. If keeping the traces separate is not possible, cross the sensitive trace perpendicular as opposed to in parallel with the noisy trace. • Place the external components as close to the device as possible. Keep RF and RG close to the inverting input to minimize parasitic capacitance (see also Section 9.4.2). • Keep the length of input traces as short as possible. Always remember that the input traces are the most sensitive part of the circuit. • Consider a driven, low-impedance guard ring around the critical traces. A guard ring helps significantly reduce leakage currents from nearby traces that are at different potentials. 9.4.2 Layout Examples NC VCC+ IN1 í IN1+ VCC í NC OUT NC RG RIN RF GND VIN VS- GND VS+ GND Run the input traces as far away from the supply lines as possible Only needed for dual-supply operation Place components close to device and to each other to reduce parasitic errors Use low-ESR, ceramic bypass capacitor (or GND for single supply) Ground (GND) plane on another layer VOUT Figure 9-3. Operational Amplifier Board Layout for Noninverting Configuration + – RIN RF VOUT RG VIN Figure 9-4. Operational Amplifier Schematic for Noninverting Configuration LM124, LM124A, LM224, LM224A, LM224K, LM224KA LM324, LM324A, LM324B, LM324BA, LM324K, LM324KA LM2902, LM2902B, LM2902BA, LM2902K, LM2902KAV, LM2902KV SLOS066AE – AUGUST 1975 – REVISED SEPTEMBER 2025 www.ti.com 26 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: LM124 LM124A LM224 LM224A LM224K LM224KA LM324 LM324A LM324B LM324BA LM324K LM324KA LM2902 LM2902B LM2902BA LM2902K LM2902KAV LM2902KV |
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