over operating temperature range (unless otherwise noted)

MIN

NOM

MAX

UNIT

TJ

Operating junction temperature

–40

150

°C

(1)

Current flowing through boot diode (DBOOT) needs to be limited for CBOOT > 1µF

7.4 Thermal Information

THERMAL METRIC(1)

DRV8300

UNIT

PW (TSSOP)

RGE (VQFN)

20 PINS

24 PINS

RθJA

Junction-to-ambient thermal resistance

97.4

49.3

°C/W

RθJC(top) Junction-to-case (top) thermal resistance

38.3

42.5

°C/W

RθJB

Junction-to-board thermal resistance

48.8

26.5

°C/W

ΨJT

Junction-to-top characterization parameter

4.3

2.2

°C/W

ΨJB

Junction-to-board characterization parameter

48.4

26.4

°C/W

RθJC(bot) Junction-to-case (bottom) thermal resistance

N/A

11.5

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

7.5 Electrical Characteristics

4.8 V ≤ VGVDD ≤ 20 V, –40°C ≤ TJ ≤ 150°C (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

POWER SUPPLIES (GVDD, BSTx)

IGVDD

GVDD standby mode current

INHx = INLX = 0; VBSTx = VGVDD

400

800

1400

µA

GVDD active mode current

INHx = INLX = Switching @20kHz; VBSTx

= VGVDD; NO FETs connected

400

825

1400

µA

ILBSx

Bootstrap pin leakage current

VBSTx = VSHx = 85V; VGVDD = 0V

2

4

7

µA

ILBS_TRAN

Bootstrap pin active mode transient

leakage current

INHx = Switching@20kHz

30

105

220

µA

ILBS_DC

Bootstrap pin active mode leakage

static current

INHx = High

30

85

150

µA

ILSHx

High-side source pin leakage current

INHx = INLX = 0; VBSTx - VSHx = 12V;

VSHx = 0 to 85V

30

55

80

µA

LOGIC-LEVEL INPUTS (INHx, INLx, MODE)

VIL_MODE

Input logic low voltage

Mode pin

0.6

V

VIL

Input logic low voltage

INLx, INHx pins

0.8

V

VIH_MODE

Input logic high voltage

Mode pin

3.7

V

VIH

Input logic high voltage

INLx, INHx pins

2.0

V

VHYS_MODE

Input hysteresis

Mode pin

1600

2000

2400

mV

VHYS

Input hysteresis

INLx, INHx pins

40

100

260

mV

IIL_INLx

INLx Input logic low current

VPIN (Pin Voltage) = 0 V; INLx in non-

inverting mode

-1

0

1

µA

VPIN (Pin Voltage) = 0 V; INLx in inverting

mode

5

20

30

µA

IIH_INLx

INLx Input logic high current

VPIN (Pin Voltage) = 5 V; INLx in non-

inverting mode

5

20

30

µA

VPIN (Pin Voltage) = 5 V; INLx in inverting

mode

0

0.5

1.5

µA

IIL

INHx, MODE Input logic low current

VPIN (Pin Voltage) = 0 V;

-1

0

1

µA

IIH

INHx, MODE Input logic high current VPIN (Pin Voltage) = 5 V;

5

20

30

µA

RPD_INHx

INHx Input pulldown resistance

To GND

120

200

280

kΩ

www.ti.com

DRV8300

SLVSFG5D – SEPTEMBER 2020 – REVISED MARCH 2022

Copyright © 2022 Texas Instruments Incorporated

Submit Document Feedback

7

Product Folder Links: DRV8300