DP83867CSRGZR.B datasheet(63/129 Pages) TI2

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7.6.17 Interrupt Status Register (ISR)

This register contains event status for the interrupt function. If an event has occurred since the last read of this

enabled.

Table 7-27. Interrupt Status Register (ISR), Address 0x0013

BIT

BIT NAME

DEFAULT

DESCRIPTION

AUTONEG_ERR_INT

0, RO, LH, COR Auto-Negotiation Error Interrupt:

1 = Auto-Negotiation Error interrupt is pending and is cleared by the

current read.

0 = No Auto-Negotiation Error interrupt.

SPEED_CHNG_INT

0, RO, LH, COR Speed Change Interrupt:

1 = Speed Change interrupt is pending and is cleared by the current

read.

0 = No Speed Change interrupt.

DUPLEX_MODE_CHNG_INT

0, RO, LH, COR Duplex Mode Change Interrupt:

1 = Duplex Mode Change interrupt is pending and is cleared by the

current read.

0 = No Duplex Mode Change interrupt.

PAGE_RECEIVED_INT

0, RO, LH, COR Page Received Interrupt:

1 = Page Received Interrupt is pending and is cleared by the current

read.

0 = No Page Received Interrupt is pending.

AUTONEG_COMP_INT

0, RO, LH, COR Auto-Negotiation Complete Interrupt:

1 = Auto-Negotiation Complete Interrupt is pending and is cleared by

the current read.

0 = No Auto-Negotiation Complete Interrupt is pending.

LINK_STATUS_CHNG_INT

0, RO, LH, COR Link Status Change Interrupt:

1 = Link Status Change interrupt is pending and is cleared by the

current read.

0 = No Link Status Change interrupt is pending.

RESERVED

0, RO

RESERVED

FALSE_CARRIER_INT

0, RO, LH, COR False Carrier Interrupt:

1 = False Carrier interrupt is pending and is cleared by the current

read.

0 = No False Carrier interrupt is pending.

RESERVED

0, RO

RESERVED

MDI_CROSSOVER_CHNG_INT

0, RO, LH, COR MDI Crossover Change Interrupt:

1 = MDI Crossover Change interrupt is pending and is cleared by the

current read.

0 = No MDI Crossover Change interrupt is pending.

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DP83867CS, DP83867IS, DP83867E

SNLS504F – OCTOBER 2015 – REVISED JANUARY 2025

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