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INA828 bảng dữ liệu(PDF) 15 Page - Texas Instruments |
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INA828 bảng dữ liệu(HTML) 15 Page - Texas Instruments |
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15 / 32 page ![]() 7 Detailed Description 7.1 Overview The INA630 is a monolithic precision instrumentation amplifier that incorporates an indirect current-feedback architecture. The block diagram in Figure 7-1 provides an overview of the functionality of this architecture. The differential input signal (VDM) is converted by the transconductance amplifier (gm1) into an input current (IIN). The common-mode voltage (VCM) is thereby directly rejected on the inputs. An additional transconductance amplifier (gm2) converts the feedback voltage across R1 (VFB – VREF) into a feedback current (IFB). IFB is then subtracted from the input current IIN. The integrator amplifier (gm3) converts the differential current back to an output voltage (VOUT). If VDM is far different then feedback voltage, IOUT increases and thus VOUT increases. When the input differential voltage and the feedback voltage are the same, generating IIN and IREF to be the same, the differential current IOUT is zero and VOUT is stabilized. An accurate output voltage is dependent on the differential current IOUT, therefore the matching of the two transconductances gm1 and gm2 primarily defines the linearity and accuracy of this architecture. In the INA630, gain is set externally by the ratio of resistors R1 and R2. Unlike a traditional INA, in the indirect current feedback architecture, the input common-mode voltage is rejected by the first transconductance amplifier (gm1) and the output swing is not limited by the input common-mode voltage. The precision performance of the INA630 is optimized for maximum differential input voltages less then ±125mV. When this limit is exceeded, the differential voltage protection scheme shown in Input Protection limit the input current to a safe level while ensuring the outputs to stay within the rails. 7.2 Functional Block Diagram R2 R1 + – GND + – VDM/2 VDM/2 + VOUT VFB VREF VINP VINN gm3 VCM VS VS VS+ IFB IIN IOUT VS VS+ VS VS+ VS VS+ VS VS+ R4 R5 R3 R6 Figure 7-1. Detailed Schematic of INA630 www.ti.com INA630 SBOSAI8A – MARCH 2025 – REVISED JULY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 15 Product Folder Links: INA630 |
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