8.3 Power Supply Recommendations

The power supply can be any voltage between the minimum and maximum supply voltage rating listed in the

Recommended Operating Conditions.

Each VCC terminal should have a good bypass capacitor to prevent power disturbance. For the CD74ACT157, a

0.1μF bypass capacitor is recommended. To reject different frequencies of noise, use multiple bypass capacitors

in parallel. Capacitors with values of 0.1μF and 1μF are commonly used in parallel.

8.4 Layout

8.4.1 Layout Guidelines

• Bypass capacitor placement

– Place near the positive supply terminal of the device

– Provide an electrically short ground return path

– Use wide traces to minimize impedance

– Keep the device, capacitors, and traces on the same side of the board whenever possible

• Signal trace geometry

– 8mil to 12mil trace width

– Lengths less than 12cm to minimize transmission line effects

– Avoid 90° corners for signal traces

– Use an unbroken ground plane below signal traces

– Flood fill areas around signal traces with ground

– Parallel traces must be separated by at least 3x dielectric thickness

– For traces longer than 12cm

• Use impedance controlled traces

• Source-terminate using a series damping resistor near the output

• Avoid branches; buffer each signal that must branch separately

8.4.2 Layout Example

W

W

≥ 5W

WORST

BETTER

BEST

Figure 8-3. Example Trace Corners for Improved Signal Integrity

CD74ACT157

SCHS340D – MARCH 2003 – REVISED JULY 2025

www.ti.com

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