TDA7491HV datasheet(35/50 Pages) STMICROELECTRONICS

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8.3

Input resistance and capacitance

The input impedance is set by an internal resistor Ri = 68 kΩ (typical). An input capacitor (Ci) is required to couple

the AC input signal.

The equivalent circuit and frequency response of the input components are shown in figure below. For Ci = 220

nF, the high-pass filter cut-off frequency is below 20 Hz:

fc = 1 / (2 * π * Ri * Ci)

Figure 53. Device input circuit and frequency response

8.4

Internal and external clocks

The clock of the class-D amplifier can be generated internally or can be driven by an external source.

If two or more class-D amplifiers are used in the same system, it is recommended that all the devices operate at

the same clock frequency. This can be implemented by using one TDA7491HV as master clock, while the other

devices are in slave mode, that is, externally clocked. The clock interconnect is via pin SYNCLK of each device.

As explained below, SYNCLK is an output in master mode and an output in master mode and an input in slave

mode.

8.4.1

Master mode (internal clock)

Using the internal oscillator, the output switching frequency, fSW, is controlled by the resistor, ROSC, connected to

pin ROSC:

fSW = 106 / ((16* ROSC+ 182) * 4) kHz

where ROSC is in kΩ.

In master mode, pin SYNCLK is used as a clock output pin whose frequency is:

fSYNCLK = 2 * fSW

For master mode to operate correctly, then resistor ROSC must be less than 60 kΩ as given below in Table 8. How

to set up SYNCLK.

TDA7491HV

Input resistance and capacitance

DS5624 - Rev 10

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