7.6 Insulation Specifications

over operating ambient temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

VALUE

UNIT

GENERAL

CLR

External clearance(1)

Shortest terminal-to-terminal distance through air

≥ 8.5

mm

CPG

External Creepage(1)

Shortest terminal-to-terminal distance across the

package surface

≥ 8.5

mm

DTI

Distance through the insulation

Minimum internal gap (internal clearance) of the

double isolation (2 x 0.0105 mm)

≥ 0.021

mm

CTI

Comparative tracking index

DIN EN 60112 (VDE 0303-11); IEC 60112

≥ 600

V

Material Group

According to IEC 60664-1

I

Overvoltage category

Rated mains voltage ≤ 600 VRMS

I-IV

Rated mains voltage ≤ 1000 VRMS

I-III

DIN VDE 0884-11 (VDE V 0884-11): 2017-01

VIORM

Maximum repetitive peak isolation voltage

AC voltage (bipolar)

2121

VPK

VIOWM

Maximum isolation working voltage

AC voltage (sine wave); time-dependent dielectric

breakdown (TDDB) test; see Figure 4

1500

VRMS

DC voltage

2121

VDC

VIOTM

Maximum transient isolation voltage

VTEST = VIOTM, t = 60 s (qualification test)

7071

VPK

VTEST = VIOTM, t = 1 s (100% production test)

8485

VPK

VIOSM

Maximum surge isolation voltage(2)

Test method per IEC 60065, 1.2/50 µs waveform,

VTEST = 1.6 × VIOSM = 12800 VPK (qualification)

8000

VPK

qpd

Apparent charge(3)

Method a: After I/O safety test subgroup 2/3, Vini

= VIOTM, tini = 60 s; Vpd(m) = 1.2 × VIORM = 2545

VPK, tm = 10 s

≤ 5

pC

Method a: After environmental tests subgroup 1,

Vini = VIOTM, tini = 60 s; Vpd(m) = 1.6 × VIORM =

3394 VPK, tm = 10 s

≤ 5

Method b1: At routine test (100% production) and

preconditioning (type test), Vini = VIOTM, tini = 1 s;

Vpd(m) = 1.875 × VIORM = 3977 VPK, tm = 1 s

≤ 5

CIO

Barrier capacitance, input to output(4)

VIO = 0.4 × sin (2 πft), f = 1 MHz

~1.5

pF

RIO

Insulation resistance, input to output(4)

VIO = 500 V, TA = 25°C

> 1012

Ω

VIO = 500 V, 100°C ≤ TA ≤ 125°C

> 1011

VIO = 500 V at TS = 150°C

> 109

Pollution degree

2

Climatic category

55/125/21

UL 1577

VISO

Withstand isolation voltage

VTEST = VISO = 5000 VRMS, t = 60 s (qualification),

VTEST = 1.2 × VISO = 6000 VRMS, t = 1 s (100%

production)

5000

VRMS

(1)

Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application.

Careshould be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the

isolator onthe printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal

in certain cases.Techniques such as inserting grooves, ribs, or both on a printed-circuit board are used to help increase these

specifications.

(2)

Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier.

(3)

Apparent charge is electrical discharge caused by a partial discharge (pd).

(4)

All pins on each side of the barrier tied together creating a two-pin device.

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AMC1300

SBAS895D – MAY 2018 – REVISED MAY 2022

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