Symbol

Parameter

Min.

Typ.

Max.

Unit

GM

Gain margin

RL = 8 Ω, CL = 500 pF

20

dB

GBP

Gain bandwidth product

RL = 8 Ω

2

MHz

1. Standby mode is actived when Vstdby is tied to VCC

2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to VCC @ f = 217 Hz

Table 6. Bill of material

Components

Functional description

Rin

Inverting input resistor which sets the closed loop gain in conjunction with Rfeed. This

resistor also forms a high pass filter with Cin [fc = 1 / (2 x Pi x Rin x Cin)]

Cin

Input coupling capacitor which blocks the DC voltage at the amplifier input terminal

Rfeed

Feed back resistor which sets the closed loop gain in conjunction with Rin

Cs

Supply bypass capacitor which provides power supply filtering

Cb

Bypass pin capacitor which provides half supply filtering

Cfeed

Low pass filter capacitor allowing to cut the high frequency

[low pass filter cut-off frequency 1 / (2 x Pi x Rfeed x Cfeed)]

Rstb

Pull-up resistor which fixes the right supply level on the standby pin

Gv

Closed loop gain in BTL configuration = 2 x (Rfeed / Rin)

Remarks

1. All measurements, except PSRR measurements, are made with a supply bypass capacitor Cs = 100 μF.

2. External resistors are not needed for having better stability when supply @ VCC down to 3 V. By the way, the

quiescent current remains the same.

3. The standby response time is about 1 μs.

TS4871

Electrical characteristics

DS2547 - Rev 10

page 6/42