ML4800

PRODUCT SPECIFICATION

2

REV. 1.0.5 9/25/01

Pin Configuration

Pin Description

Pin

Name

Function

1

IEAO

Slew rate enhanced PFC transconductance error amplifier output

2IAC

PFC AC line reference input to Gain Modulator

3ISENSE

Current sense input to the PFC Gain Modulator

4VRMS

PFC Gain Modulator RMS line voltage compensation input

5

SS

Connection point for the PWM soft start capacitor

6VDC

PWM voltage feedback input

7

RAMP 1

Oscillator timing node; timing set by RTCT

8

RAMP 2

When in current mode, this pin functions as the current sense input; when in voltage mode,

it is the PWM modulation ramp input.

9

DC ILIMIT

PWM cycle-by-cycle current limit comparator input

10

GND

Ground

11

PWM OUT

PWM driver output

12

PFC OUT

PFC driver output

13

VCC

Positive supply

14

VREF

Buffered output for the internal 7.5V reference

15

VFB

PFC transconductance voltage error amplifier input

16

VEAO

PFC transconductance voltage error amplifier output

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

IEAO

IAC

ISENSE

VRMS

SS

VDC

RAMP 1

RAMP 2

VEAO

VFB

VREF

VCC

PFC OUT

PWM OUT

GND

DC ILIMIT

TOP VIEW

ML4800

16-Pin PDIP (P16)

16-Pin Narrow SOIC (S16N)