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LPV821 bảng dữ liệu(PDF) 17 Page - Texas Instruments |
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LPV821 bảng dữ liệu(HTML) 17 Page - Texas Instruments |
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17 / 25 page ![]() 17 LPV821 www.ti.com SNOSD36A – AUGUST 2017 – REVISED DECEMBER 2017 Product Folder Links: LPV821 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated 11 Layout 11.1 Layout Guidelines 11.1.1 General Layout Guidelines Pay attention to good layout practices. Keep traces short and when possible, use a printed-circuit-board (PCB) ground plane with surface-mount components placed as close to the device pins as possible. Place a 0.1-μF capacitor closely across the supply pins. Apply these guidelines throughout the analog circuit to improve performance and provide benefits, such as reducing the electromagnetic interference (EMI) susceptibility. Operational amplifiers vary in susceptibility to radio frequency interference (RFI). RFI can generally be identified as a variation in offset voltage or DC signal levels with changes in the interfering RF signal. The LPV821 is specifically designed to minimize susceptibility to RFI and demonstrates remarkably low sensitivity compared to previous generation devices. Strong RF fields may still cause varying offset levels. 11.2 Layout Example Figure 41. SOT-23 Layout Example |
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