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LPV511 bảng dữ liệu(PDF) 15 Page - Texas Instruments |
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LPV511 bảng dữ liệu(HTML) 15 Page - Texas Instruments |
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15 / 26 page ![]() + - VIN RISO VOUT Copyright © 2016, Texas Instruments Incorporated 15 LPV511 www.ti.com SNOSAG7D – AUGUST 2005 – REVISED AUGUST 2016 Product Folder Links: LPV511 Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Device Functional Modes (continued) 7.4.2 Output Stage The LPV511 output voltage swing 100 mV from rails at 3-V supply, which provides the maximum possible dynamic range at the output. This is particularly important when operating on low supply voltages. The LPV511 maximum output voltage swing defines the maximum swing possible under a particular output load. The LPV511 output swings 110 mV from the rail at 5-V supply with an output load of 100 kΩ. 7.4.3 Driving Capacitive Load The LPV511 is internally compensated for stable unity gain operation, with a 27-kHz typical gain bandwidth. However, the unity gain follower is the most sensitive configuration to capacitive load. Direct capacitive loading reduces the phase margin of the op amp. When the output is required to drive a large capacitive load, greater than 100 pF, a small series resistor at the output of the amplifier improves the phase margin (see Figure 27). In Figure 27, the isolation resistor RISO and the load capacitor CL form a pole to increase stability by adding more phase margin to the overall system. The desired performance depends on the value of RISO. The bigger the RISO resistor value, the more stable VOUT will be. But the DC accuracy is degraded when the RISO gets bigger. If there were a load resistor in Figure 27, the output voltage would be divided by RISO and the load resistor. Figure 27. Resistive Isolation of Capacitive Load |
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