LP3995

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SNVS179F – FEBRUARY 2003 – REVISED SEPTEMBER 2015

6.4 Thermal Information

LP3995

THERMAL METRIC(1)

YZR (DSBGA)

NGD (WSON)

UNIT

5 PINS

6 PINS

RθJA

(2)

Junction-to-ambient thermal resistance, High-K

181.2

68.5(3)

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

0.8

71.8

°C/W

RθJB

Junction-to-board thermal resistance

107.9

35.2

°C/W

ψJT

Junction-to-top characterization parameter

0.5

1.4

°C/W

ψJB

Junction-to-board characterization parameter

107.9

35.0

°C/W

RθJC(bot)

Junction-to-case (bottom) thermal resistance

N/A

8.1

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

(2)

Thermal resistance value RθJA is based on the EIA/JEDEC High-K printed circuit board defined by: JESD51-7 - High Effective Thermal

Conductivity Test Board for Leaded Surface Mount Packages.

(3)

The PCB for the NGD (WSON) package RθJA includes two (2) thermal vias under the exposed thermal pad per EIA/JEDEC JESD51-5.

6.5 Electrical Characteristics

Unless otherwise noted, VEN = 1.5 V, VIN = VOUT + 1 V, CIN = 1 µF, IOUT = 1 mA, COUT = 1 µF, CBYPASS = 0.01 µF. Typical

(TYP) values and limits apply for TJ = 25°C; minimum (MIN) and maximum (MAX) apply over the full temperature range for

operation,

−40 to +125°C, unless otherwise specified in the Test Conditions.

(1) (2)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VIN

Input voltage

2.5

6

V

DEVICE OUTPUT: 1.5

≤ VOUT < 1.8V

IOUT = 1 mA, TJ = 25°C

–50

50

Output voltage tolerance

mV

IOUT = 1 mA

–75

75

VIN = (VOUT(NOM)+1 V) to 6V,

ΔVOUT

Line regulation error

–3.5

3.5

µV/mA

IOUT = 1 mA

Load regulation error, DSBGA

IOUT = 1 mA to 150 mA

10

75

µV/mA

Load regulation error, WSON

IOUT = 1 mA to 150 mA

70

125

µV/mA

ƒ = 1 kHz, IOUT = 1 mA

55

PSRR

Power supply rejection ratio(3)

dB

ƒ = 10 kHz, IOUT = 1 mA

53

DEVICE OUTPUT: 1.8 V

≤ VOUT < 2.5 V

IOUT = 1 mA, TJ = 25°C

–50

50

Output voltage tolerance

mV

IOUT = 1 mA

–75

75

VIN = (VOUT(NOM)+1 V) to 6 V,

Line regulation error, DSBGA

–2.5

2.5

mV/V

IOUT = 1 mA

ΔVOUT

VIN = (VOUT(NOM)+1 V) to 6 V

Line regulation error, WSON

–3.5

3.5

mV/V

IOUT = 1 mA

Load regulation error, DSBGA

IOUT = 1 mA to 150 mA

10

75

µV/mA

Load regulation error, WSON

IOUT = 1 mA to 150 mA

80

125

µV/mA

ƒ = 1 kHz, IOUT = 1 mA

55

PSRR

Power supply rejection ratio(3)

dB

ƒ = 10 kHz, IOUT = 1 mA

50

(1)

All limits are ensured. All electrical characteristics having room-temperature limits are tested during production at TJ = 25°C or correlated

using Statistical Quality Control methods. Operation over the temperature specification is specified by correlating the electrical

characteristics to process and temperature variations and applying statistical process control.

(2)

VOUT(NOM) is the stated output voltage option for the device.

(3)

This electrical specification is ensured by design.

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