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XC2000 bảng dữ liệu(PDF) 76 Page - Infineon Technologies AG |
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XC2000 bảng dữ liệu(HTML) 76 Page - Infineon Technologies AG |
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76 / 112 page ![]() XC2230L, XC2234L XC2000 Family / Econo Line Electrical Parameters Data Sheet 72 V1.3, 2015-02 2) This parameter includes the sample time (also the additional sample time specified by STC), the time to determine the digital result and the time to load the result register with the conversion result. Values for the basic clock t ADCI depend on programming. 3) The broken wire detection delay against V AGND is measured in numbers of consecutive precharge cycles at a conversion rate of not more than 500 µs. Result below 10% (66 H) 4) The broken wire detection delay against V AREF is measured in numbers of consecutive precharge cycles at a conversion rate of not more than 10 µs. This function is influenced by leakage current, in particular at high temperature. Result above 80% (332 H) 5) V AIN may exceed VAGND or VAREF up to the absolute maximum ratings. However, the conversion result in these cases will be X000 H or X3FFH, respectively. Table 21 ADC Parameters for Upper Voltage Range Parameter Symbol Values Unit Note / Test Condition Min. Typ. Max. Input resistance of the selected analog channel R AIN CC − 0.9 1.5 kOh m not subject to production test 1) Input resistance of the reference input R AREF CC − 0.5 1 kOh m not subject to production test 1) Differential Non-Linearity Error 2)3)4)5) | EA DNL| CC − 2.5 5.0 LSB Gain Error 2)3)4)5) | EA GAIN| CC − 2.5 6.0 LSB Integral Non- Linearity 2)3)4)5) | EA INL| CC − 2.0 4.0 LSB Offset Error 2)3)4)5) | EA OFF| CC − 2.0 4.0 LSB Analog clock frequency f ADCI SR 2 − 20 MHz Std. reference input ( V AREF) 2 − 17.5 MHz Alt. reference input (CH0) Total Unadjusted Error 3)4) |TUE| CC − 2.5 5.5 LSB 6)7) Wakeup time from analog powerdown, fast mode t WAF CC −− 7.0 μs Wakeup time from analog powerdown, slow mode t WAS CC −− 11.5 μs |
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