LM2621

SNVS033D – MAY 2004 – REVISED NOVEMBER 2015

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6.2 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

NOM

MAX

UNIT

VDD

2.5

5

V

FB

0

VDD

V

EN

0

VDD

V

BOOT

0

10

V

Ambient Temperature, TA

–40

85

°C

6.3 Thermal Information

LM2621

THERMAL METRIC(1)

DGK (VSSOP)

UNIT

8 PINS

RθJA

Junction-to-ambient thermal resistance (2)

160

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

52.7

°C/W

RθJB

Junction-to-board thermal resistance

80.1

°C/W

ψJT

Junction-to-top characterization parameter

5.5

°C/W

ψJB

Junction-to-board characterization parameter

78.8

°C/W

RθJC(bot)

Junction-to-case (bottom) thermal resistance

N/A

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

(2)

The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax (maximum junction temperature),

θJA (junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any

temperature is Pdmax = (Tjmax - TA)/ θJA or the number given in the Absolute Maximum Ratings, whichever is lower.

6.4 Electrical Characteristics

Unless otherwise specified: VDD= VOUT= 3.3 V, TJ = 25°C.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VIN_ST

Minimum Start-Up Supply

ILOAD = 0 mA

1.1

V

Voltage(1)

ILOAD = 0 mA, –40°C to 85°C

1.2

VIN_OP

Minimum Operating Supply

ILOAD = 0 mA

0.65

V

Voltage (once started)

VFB

FB Pin Voltage

1.24

V

–40°C to 85°C

1.2028

1.2772

VOUT_MAX

Maximum Output Voltage

14

V

VHYST

Hysteresis Voltage(2)

30

mV

–40°C to 85°C

45

η

Efficiency

VIN = 3.6 V; VOUT = 5 V; ILOAD = 500 mA

87%

VIN = 2.5 V; VOUT = 3.3 V; ILOAD = 200 mA

87%

D

Switch Duty Cycle

70%

−40°C to 85°C

60%

80%

IDD

Operating Quiescent

FB Pin > 1.3 V; EN Pin at VDD

80

µA

Current(3)

FB Pin > 1.3 V; EN Pin at VDD, –40°C to 85°C

110

ISD

Shutdown Quiescent

VDD, BOOT and SW Pins at 5.0 V; EN Pin < 200

0.01

Current(4)

mV

µA

VDD, BOOT and SW Pins at 5.0 V; EN Pin < 200

2.5

mV, –40°C to 85°C

ICL

Switch Peak Current Limit

2.85

A

(1)

Output in regulation, VOUT = VOUT (NOMINAL) ± 5%

(2)

This is the hysteresis value of the internal comparator used for the gated-oscillator control scheme.

(3)

This is the current into the VDD pin.

(4)

This is the total current into pins VDD, BOOT, SW and FREQ.

4

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