Case Temperature - °C

0

100

200

300

400

500

0

50

100

150

200

250

V

and V

at 3.45 V

CC1

CC2

V

and V

at 5.25 V

CC1

CC2

ISO7520C, ISO7521C

www.ti.com

SLLSE39E – JUNE 2010 – REVISED MAY 2015

empty para for space above the NOTE

NOTE

Creepage and clearance requirements should be applied according to the specific

equipment isolation standards of an application. Care should be taken to maintain the

creepage and clearance distance of a board design to ensure that the mounting pads of

the isolator on the printed-circuit-board (PCB) do not reduce this distance.

Creepage and clearance on a PCB become equal according to the measurement

techniques shown in the Isolation Glossary. Techniques such as inserting grooves and/or

ribs on a printed circuit board are used to help increase these specifications.

8.3.4 Safety Limiting Values

Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output circuitry.

A failure of the I/O can allow low resistance to ground or the supply and, without current-limiting, dissipate

sufficient power to overheat the die and damage the isolation barrier potentially leading to secondary system

failures.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

θJA =79.9°C/W, VI = 5.25 V, TJ = 150°C, TA = 25°C

298

Is

Safety input, output, or supply current

mA

θJA =79.9°C/W, VI = 3.45 V, TJ = 150°C, TA = 25°C

453

Ts

Maximum Case Temperature

150

°C

The safety-limiting constraint is the absolute maximum junction temperature specified in the absolute maximum

ratings table. The power dissipation and junction-to-air thermal impedance of the device installed in the

application hardware determines the junction temperature. The assumed junction-to-air thermal resistance in the

Thermal Information table is that of a device installed on a High-K Test Board for Leaded Surface-Mount

Packages. The power is the recommended maximum input voltage times the current. The junction temperature is

then the ambient temperature plus the power times the junction-to-air thermal resistance.

Figure 8. DW-16 RΘJC Thermal Derating Curve for VDE

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