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CD54HC73F bảng dữ liệu(PDF) 10 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  CDx4HC73 CD74HCT73 Dual J-K Flip-Flop with Reset Negative-Edge Trigger
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8 Power Supply Recommendations
The power supply can be any voltage between the minimum and maximum supply voltage rating located in
the Recommended Operating Conditions. Each VCC terminal should have a good bypass capacitor to prevent
power disturbance. A 0.1-μF capacitor is recommended for this device. It is acceptable to parallel multiple
bypass capacitors to reject different frequencies of noise. The 0.1-μF and 1-μF capacitors are commonly used in
parallel. The bypass capacitor should be installed as close to the power terminal as possible for best results.
9 Layout
9.1 Layout Guidelines
When using multiple-input and multiple-channel logic devices, inputs must not ever be left floating. In many
cases, functions or parts of functions of digital logic devices are unused; for example, when only two inputs of a
triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such unused input pins must not be left
unconnected because the undefined voltages at the outside connections result in undefined operational states.
All unused inputs of digital logic devices must be connected to a logic high or logic low voltage, as defined by the
input voltage specifications, to prevent them from floating. The logic level that must be applied to any particular
unused input depends on the function of the device. Generally, the inputs are tied to GND or VCC, whichever
makes more sense for the logic function or is more convenient.
CD54HC73, CD74HC73, CD74HCT73
SCHS134G – FEBRUARY 1998 – REVISED OCTOBER 2022
www.ti.com
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Product Folder Links: CD54HC73 CD74HC73 CD74HCT73



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