Return to the Summary Table.

The BTRDCNT register allows configuration of the number of bytes that will be read back from the SMBus

interface on an issued read command.

Table 7-10. BTRDCNT Register Field Descriptions

Bit

Field

Type

Reset

Description

7-6

RESERVED

R

0h

Reserved

5-0

Read Byte Count[5:0]

R/W

8h

Writing to this register configures how many bytes will be read back.

7.1.9 SBIMSK1 Register (Address = 8h) [reset = 0h]

SBIMSK1 is shown in Table 7-11.

Return to the Summary Table.

The SBIMSK1 register allows the SMBus to force enable each output channel individually when the

CDCDB2000 is in Side-Band interface mode.

Table 7-11. SBIMSK1 Register Field Descriptions

Bit

Field

Type

Reset

Description

7

SBI Output Mask, CK7

R/W

0h

This bit overrides the the SBI output disable when set.

0h = SBI Controls Output

1h = Output CK7 Enabled

6

SBI Output Mask, CK6

R/W

0h

This bit overrides the the SBI output disable when set.

0h = SBI Controls Output

1h = Output CK6 Enabled

5

SBI Output Mask, CK5

R/W

0h

This bit overrides the the SBI output disable when set.

0h = SBI Controls Output

1h = Output CK5 Enabled

4

SBI Output Mask, CK4

R/W

0h

This bit overrides the the SBI output disable when set.

0h = SBI Controls Output

1h = Output CK4 Enabled

3

SBI Output Mask, CK3

R/W

0h

This bit overrides the the SBI output disable when set.

0h = SBI Controls Output

1h = Output CK3 Enabled

2

SBI Output Mask, CK2

R/W

0h

This bit overrides the the SBI output disable when set.

0h = SBI Controls Output

1h = Output CK2 Enabled

1

SBI Output Mask, CK1

R/W

0h

This bit overrides the the SBI output disable when set.

0h = SBI Controls Output

1h = Output CK1 Enabled

0

SBI Output Mask, CK0

R/W

0h

This bit overrides the the SBI output disable when set.

0h = SBI Controls Output

1h = Output CK0 Enabled

7.1.10 SBIMSK2 Register (Address = 9h) [reset = 0h]

SBIMSK2 is shown in Table 7-12.

Return to the Summary Table.

The SBIMSK2 register allows the SMBus to force enable each output channel individually when the

CDCDB2000 is in Side-Band interface mode.

CDCDB2000

SNAS787B – NOVEMBER 2019 – REVISED OCTOBER 2024

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