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CD54HC573F bảng dữ liệu(PDF) 4 Page - Texas Instruments

tên linh kiện CD54HC573F
Giải thích chi tiết về linh kiện  CDx4HC573 Octal Transparent D-Type Latches With 3-State Outputs
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CD54HC573F bảng dữ liệu(HTML) 4 Page - Texas Instruments

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5 Specifications
5.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
UNIT
VCC
Supply voltage range
–0.5
7
V
IIK
Input clamp current(2)
VI < 0 or VI > VCC
± 20
mA
IOK
Output clamp current(2)
VO < 0 or VO > VCC
± 20
mA
IO
Continuous output drain current per output
VO = 0 to VCC
± 35
mA
IO
Continuous output source or sink current per output
VO = 0 to VCC
± 25
mA
Continuous current through VCC or GND
± 50
mA
TJ
Storage temperature
150
℃
Tstg
Storage temperature range
–65
150
℃
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
5.2 Recommended Operating Conditions(1)
TA = 25°C
TA = –55°C to
125°C
TA = –40°C to 85°C
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
VCC
Supply voltage
2
6
2
6
2
6
V
VIH
High-level input voltage
VCC = 2 V
1.5
1.5
1.5
V
VCC = 4.5 V
3.15
3.15
3.15
VCC = 6 V
4.2
4.2
4.2
VIL
Low-level input voltage
VCC = 2 V
0.5
0.5
0.5
V
VCC = 4.5 V
1.35
1.35
1.35
VCC = 6 V
1.8
1.8
1.8
VI
Input voltage
0
VCC
0
VCC
0
VCC
V
VO
Output voltage
0
VCC
0
VCC
0
VCC
V
tt
Input transition (rise and fall) time
VCC = 2 V
1000
1000
1000
ns
VCC = 4.5 V
500
500
500
VCC = 6 V
400
400
400
(1)
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
5.3 Thermal Information
THERMAL METRIC
DW (SOIC)
N (PDIP)
UNIT
20 PINS
20 PINS
RθJA
Junction-to-ambient thermal resistance
(1)
109.1
84.6
°C/W
RθJC (top)
Junction-to-case (top) thermal resistance
76
72.5
°C/W
RθJB
Junction-to-board thermal resistance
77.6
65.3
°C/W
ΨJT
Junction-to-top characterization parameter
51.5
55.3
°C/W
ΨJB
Junction-to-board characterization parameter
77.1
65.2
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
N/A
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application
report.
CD54HC573, CD74HC573
SCLS454C – FEBRUARY 2001 – REVISED MAY 2022
www.ti.com
4
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Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: CD54HC573 CD74HC573



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