ELECTRICAL CHARACTERISTICS

PTH04T240W, PTH04T241W

www.ti.com ...................................................................................................................................................... SLTS276D – OCTOBER 2006 – REVISED JULY 2009

PTH04T241W (Ceramic Capacitors)

TA = 25°C, VI = 5 V, VO = 3.3 V, CI = 200 µF ceramic, CO = 300 µF ceramic, and IO = IO max (unless otherwise stated)

PARAMETER

TEST CONDITIONS

PTH04T241W

UNIT

MIN

TYP

MAX

IO

Output current

Over VO range

25°C, natural convection

0

10

A

0.69

≤ VO ≤ 1.7

2.2

5.5

VI

Input voltage range

Over IO range

V

1.7 < VO ≤ 3.6 VO+0.5

(1)

5.5

VOADJ

Output voltage adjust range

Over IO range

0.69

3.6

V

Set-point voltage tolerance

±0.5

±1 (2)

%Vo

Temperature variation

–40°C < TA < 85°C

±0.3

%Vo

VO

Line regulaltion

Over VI range

±3

mV

Load regulation

Over IO range

±2

mV

Total output variation

Includes set-point, line, load, –40°C

≤ TA ≤ 85°C

±1.5 (2)

%Vo

RSET = 1.21 kΩ, VO = 3.3 V

94%

RSET = 2.38 kΩ, VO = 2.5 V

92%

RSET = 4.78 kΩ, VO = 1.8 V

90%

η

Efficiency

IO = 10 A

RSET = 7.09 kΩ, VO = 1.5 V

88%

RSET = 12.1 kΩ, VO = 1.2 V

87%

RSET = 20.8 kΩ, VO = 1.0 V

85%

RSET = 689 kΩ, VO = 0.7 V

80%

VO Ripple (peak-to-peak)

20-MHz bandwidth

20

mVPP

ILIM

Overcurrent threshold

Reset, followed by auto-recovery

20

A

ttr

w/o TurboTrans

Recovery time

60

µs

CO= 300 µF, TypeA

mV

ΔVtr

2.5 A/µs load step

VO over/undershoot

110

RTT = open

Transient response

50 to 100% IOmax

ttrTT

w/ TurboTrans

Recovery time

80

µs

VO = 2.5 V

CO= 3000 µF, TypeA

mV

ΔVtrTT

VO over/undershoot

33

RTT = short

IIL

Track input current (pin 10)

Pin to GND

–130(3)

µA

dVtrack/dt

Track slew rate capability

CO ≤ CO (max)

1

V/ms

VI increasing, RUVLO = OPEN

1.95

2.19

Adjustable Under-voltage lockout

UVLOADJ

Vi decreasing, RUVLO = OPEN

1.30

1.50

V

(pin 11)

Hysteresis, RUVLO = OPEN

0.5

Input high voltage (VIH)

Open(4)

V

Inhibit control (pin 11)

Input low voltage (VIL)

-0.2

0.8

Input low current (IIL ), Pin 11 to GND

235

µA

Iin

Input standby current

Inhibit (pin 11) to GND, Track (pin 10) open

5

mA

f s

Switching frequency

Over VI and IO ranges, SmartSync (pin 1) to GND

300

kHz

Synchronization (SYNC)

fSYNC

240

400

kHz

frequency

VSYNCH

SYNC High-Level Input Voltage

2

5.5

V

VSYNCL

SYNC Low-Level Input Voltage

0.8

V

tSYNC

SYNC Minimum Pulse Width

200

ns

CI

External input capacitance

200 (5)

µF

(1)

The minimum input voltage is 2.2 V or (VO + 0.5) V, whichever is greater.

(2)

The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a

tolerance of 1% with 100 ppm/C or better temperature stability. .

(3)

A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control pin 10. The

open-circuit voltage is less than VI.

(4)

This control pin has an internal pull-up. Do not place an external pull-up on this pin. If it is left open-circuit, the module operates when

input power is applied. A small, low-leakage (<100 nA) MOSFET is recommended for control. The open-circuit voltage is less than

3.5Vdc. For additional information, see the related application note.

(5)

200 µF of input capacitance is required for proper operation. 200 µF of ceramic or 220 µF of electrolytic input capacitance can be used.

Electrolytic capacitance must be rated for a minimum of 500 mA rms of ripple current. An additional 22-

µF ceramic input capacitor is

recommended to reduce rms ripple current.

Copyright © 2006–2009, Texas Instruments Incorporated

Submit Documentation Feedback

7

Product Folder Link(s): PTH04T240W PTH04T241W