VOUT

TIME (200 ns/DIV)

200 mA/DIV

IL

VSW

2V/DIV

10 mV/DIV

AC Coupled

VIN = 3.6V

VOUT = 1.5V

IOUT = 400 mA

LP3905

SNVS374D – JUNE 2006 – REVISED MAY 2013

www.ti.com

The output voltage is regulated by modulating the PFET switch on time to control the average current sent to the

load. The effect is identical to sending a duty-cycle modulated rectangular wave formed by the switch and

synchronous rectifier at the SW pin to a low-pass filter formed by the inductor and output filter capacitor. The

output voltage is equal to the average voltage at the SW pin.

PWM OPERATION

During PWM operation the converters operate as a voltage-mode controllers with input voltage feed forward.

This allows the converters to achieve good load and line regulation. The DC gain of the power stage is

proportional to the input voltage. To eliminate this dependence, feed forward inversely proportional to the input

voltage is introduced.

While in PWM (Pulse Width Modulation) mode, the output voltage is regulated by switching at a constant

frequency and then modulating the energy per cycle to control power to the load. At the beginning of each clock

cycle the PFET switch is turned on and the inductor current ramps up until the comparator trips and the control

logic turns off the switch. The current limit comparator can also turn off the switch in case the current limit of the

PFET is exceeded. Then the NFET switch is turned on and the inductor current ramps down. The next cycle is

initiated by the clock turning off the NFET and turning on the PFET.

Figure 7. Typical PWM Operation

Internal Synchronous Rectification

While in PWM mode, if enabled, the Bucks use an internal NFET as a synchronous rectifier to reduce rectifier

forward voltage drop and associated power loss. Synchronous rectification provides a significant improvement in

efficiency whenever the output voltage is relatively low compared to the voltage drop across an ordinary rectifier

diode.

Current Limiting

A current limit feature allows the LP3905 Bucks to protect Internal and external components during overload

conditions. PWM mode implements current limiting using an internal comparator that trips at 1000 mA (typ). If the

output is shorted to ground the device enters a timed current limit mode where the NFET is turned on for a

longer duration until the inductor current falls below a low threshold, ensuring inductor current has more time to

decay, thereby preventing runaway.

10

Submit Documentation Feedback

Copyright © 2006–2013, Texas Instruments Incorporated

Product Folder Links: LP3905