LM5025AMTCSLASHNOPB datasheet(4/34 Pages) TI2

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LM5025A

SNVS293F – DECEMBER 2004 – REVISED AUGUST 2016

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Pin Functions (continued)

I/O

DESCRIPTION

APPLICATION INFORMATION

NO.

NAME

OUT_B

Active Clamp output driver

Output of the Active Clamp switch gate driver.

Capable of 1.25-A peak sink current..

PGND

Power ground

Connect directly to analog ground.

AGND

Analog ground

Connect directly to power ground. For the WSON

package option, the exposed pad is electrically

connected to AGND.

Soft-start control

An external capacitor and an internal 20-µA current

source set the soft-start ramp. The SS current

source is reduced to 1 µA initially following a CS2

overcurrent event or an overtemperature event.

COMP

Input to the Pulse Width Modulator

An internal 5-kΩ resistor pullup is provided on this

pin. The external opto-coupler sinks current from

COMP to control the PWM duty cycle.

Oscillator timing resistor pin

An external resistor connected from RT to ground

sets the internal oscillator frequency.

SYNC

Oscillator UP and DOWN

synchronization input

The internal oscillator can be synchronized to an

external clock with a frequency 20% lower than the

internal oscillator’s free running frequency. There is

no constraint on the maximum sync frequency.

UVLO

Line undervoltage shutdown

An external voltage divider from the power source

sets the shutdown comparator levels. The

comparator threshold is 2.5 V. Hysteresis is set by

an internal current source (20 µA) that is switched

ON or OFF as the UVLO pin potential crosses the

2.5-V threshold.

—

Exposed pad, underside of the

WSON package option

Internally bonded to the die substrate. Connect to

GND potential for low thermal impedance.

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