VIH

VIL

SMBCLK

P

S

VIH

VI

L

SMBDAT

tBUF

tHD;STA

tLOW

tR

tHD;DAT

tHIGH

tF

tSU;DAT

tSU;STA

tSU;STO

P

LM86

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SNIS114E – DECEMBER 2001 – REVISED MARCH 2013

SMBus DIGITAL SWITCHING CHARACTERISTICS (continued)

Unless otherwise noted, these specifications apply for VDD=+3.0 Vdc to +3.6 Vdc, CL (load capacitance) on output lines = 80

pF. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = +25°C, unless otherwise noted.

The switching characteristics of the LM86 fully meet or exceed the published specifications of the SMBus version 2.0. The

following parameters are the timing relationships between SMBCLK and SMBData signals related to the LM86. They adhere

to but are not necessarily the SMBus bus specifications.

Typical (1)

Limits (2)

Unit

Symbol

Parameter

Test Conditions

(Limit)

tSU;STA

SMBus Repeated Start-Condition Setup Time,

0.6

µs (min)

SMBCLK High to SMBData Low

tBUF

SMBus Free Time Between Stop and Start

1.3

µs (min)

Conditions

Figure 2. SMBus Communication

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