VOUT

(VIN+ - VIN-) x GAIN

VLIMIT1

0 V

ALERT1

LATCH1

Latch Mode

Transparent Mode

Alert Does Not Clear

Alert Clears

t1

t2

t3

t4

t5

22

INA302, INA303

SBOS775C – SEPTEMBER 2016 – REVISED MARCH 2019

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The latch and transparent modes are illustrated in Figure 47. As illustrated in this figure, at time t1, the current-

sense amplifier exceeds the limit threshold. During this time the LATCH1 pin is toggled with no affect to the

ALERT1 output. The state of the LATCH1 pin only matters when the output of the current-sense amplifier returns

to the normal operating region, as shown at t2. At this time the LATCH1 pin is high and the overcurrent condition

is latched on the ALERT1 output. As shown in the time interval between t2 and t3, the latch condition is cleared

when the LATCHx pin is pulled low. At time t4, the LATCH1 pin is already pulled low when the amplifier output

drops below the limit threshold for the second time. The device is set to transparent mode at this point and the

ALERT1 pin is pulled back high as soon as the output of the current-sense amplifier drops below the alert

threshold.

Figure 47. Transparent versus Latch Mode