công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

Preview PDF HTML

TDP142 bảng dữ liệu(PDF) 8 Page - Texas Instruments

tên linh kiện TDP142
Giải thích chi tiết về linh kiện  TDP142 DisplayPortTM 8.1 Gbps Linear Redriver
PDF  36 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  TI2 [Texas Instruments]
Trang chủ  https://www.ti.com
Logo TI2 - Texas Instruments

TDP142 bảng dữ liệu(HTML) 8 Page - Texas Instruments

Back Button TDP142 Datasheet HTML 4Page - Texas Instruments TDP142 Datasheet HTML 5Page - Texas Instruments TDP142 Datasheet HTML 6Page - Texas Instruments TDP142 Datasheet HTML 7Page - Texas Instruments TDP142 Datasheet HTML 8Page - Texas Instruments TDP142 Datasheet HTML 9Page - Texas Instruments TDP142 Datasheet HTML 10Page - Texas Instruments TDP142 Datasheet HTML 11Page - Texas Instruments TDP142 Datasheet HTML 12Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 8 / 36 page
background image
8
TDP142
SLLSEZ1C – SEPTEMBER 2017 – REVISED MAY 2019
www.ti.com
Product Folder Links: TDP142
Submit Documentation Feedback
Copyright © 2017–2019, Texas Instruments Incorporated
6.8 Timing Requirements
MIN
NOM
MAX
UNIT
tDIFF_DLY
Differential Propagation Delay
See Figure 7
300
ps
tR, tF
Output Rise/Fall time (see Figure 9)
20%-80% of differential
voltage measured 1 inch
from the output pin
40
ps
tRF_MM
Output Rise/Fall time mismatch
20%-80% of differential
voltage measured 1 inch
from the output pin
2.6
ps
6.9 Switching Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DPEN and HPDIN
tDPEN_DEBOUNCE
DPEN and HPDIN debounce time when transitioning from H to L.
2
10
ms
I2C (Refer to Figure 6)
fSCL
I2C clock frequency
1
MHz
tBUF
Bus free time between START and STOP conditions
0.5
µs
tHDSTA
Hold time after repeated START condition. After this period, the first
clock pulse is generated
0.26
µs
tLOW
Low period of the I2C clock
0.5
µs
tHIGH
High period of the I2C clock
0.26
µs
tSUSTA
Setup time for a repeated START condition
0.26
µs
tHDDAT
Data hold time
0
μs
tSUDAT
Data setup time
50
ns
tR
Rise time of both SDA and SCL signals
120
ns
tF
Fall time of both SDA and SCL signals
20 × (V(I2C)/5.5
V)
120
ns
tSUSTO
Setup time for STOP condition
0.26
μs
Cb
Capacitive load for each bus line
150
pF



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com