BUS

MASTER

400 kHz

SDA

SCL

1.65 V

5 k

5 k

EN

SDAA

SCLA

SDAB

SCLB

VCCA VCCB

TCA980x

SDA

SCL

SLAVE

400 kHz

3.3 V

EN

SDAA

SCLA

SDAB

SCLB

VCCA VCCB

TCA980x

SDA

SCL

SLAVE

400 kHz

1.65 V

BUS B

BUS A

BUS C

Copyright © 2017, Texas Instruments Incorporated

25

TCA9803

www.ti.com

SCPS267B – MARCH 2017 – REVISED FEBRUARY 2020

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Copyright © 2017–2020, Texas Instruments Incorporated

Figure 31. Parallel Use Case

NOTE

Decoupling capacitors are not shown to keep the illustration simple. Decoupling capacitors

(1 µF and 0.1 µF) must be placed close to each power supply pin.

10.2.3.1 Design Requirements

The system designer must first select the correct variant of the TCA980x family for the load. In order to do this,

the information shown in Table 8 and Table 9 must be known. The setup in Figure 31 is used for these example

design requirements.

Table 8. Design Requirements for Bus B

Parameter

Description

Acceptable Range

Example Value/Target

CL

Load capacitance (bus capacitance) on B-

side

up to 400 pF

300 pF

tr

Rise time

up to 300 ns

≤ 300 ns

VCCA

VCCA supply voltage

0.8 V-3.6 V

1.65 V

VCCB

VCCB supply voltage

1.65 V-3.6 V

3.3 V