LM3550SPXSLASHNOPB datasheet(23/43 Pages) TI2

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SCL

STO

condition

START condition

SDA

SCL

data

change

allowed

data

valid

data

change

allowed

data

valid

data

change

allowed

SDA

LM3550

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SNVS569C – MAY 2009 – REVISED OCTOBER 2016

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7.5 Programming

7.5.1 I2C-Compatible Interface

7.5.1.1 Data Validity

The data on SDA line must be stable during the HIGH period of the clock signal (SCL). In other words, the state

of the data line can only be changed when SCL is LOW.

Figure 44. Data Validity Diagram

A pullup resistor between VIO (logic power supply) and SDA must be greater than [(VIO

− VOL) / 3 mA] to meet

the VOL requirement on SDA. Using a larger pullup resistor results in lower switching current with slower edges,

while using a smaller pullup resistor results in higher switching currents with faster edges.

7.5.1.2 Start and Stop Conditions

START and STOP conditions classify the beginning and the end of the I2C session. A START condition is

defined as SDA signal transitioning from HIGH to LOW while SCL line is HIGH. A STOP condition is defined as

the SDA transitioning from LOW to HIGH while SCL is HIGH. The I2C master always generates START and

STOP conditions. The I2C bus is considered to be busy after a START condition and free after a STOP condition.

During data transmission, the I2C master can generate repeated START conditions. First START and repeated

START conditions are equivalent, function-wise. The data on SDA line must be stable during the HIGH period of

the clock signal (SCL). In other words, the state of the data line can only be changed when SCL is LOW.

Figure 45. Start and Stop Conditions

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