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TVP5146M2IPFPR bảng dữ liệu(PDF) 52 Page - Texas Instruments

tên linh kiện TVP5146M2IPFPR
Giải thích chi tiết về linh kiện  NTSC/PAL/SECAM 4×10-Bit Digital Video Decoder With Macrovision™ Detection, YPbPr Inputs, 5-Line Comb Filter, and SCART Support
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TVP5146M2IPFPR bảng dữ liệu(HTML) 52 Page - Texas Instruments

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TVP5146M2
SLES141H
– JULY 2005 – REVISED FEBRUARY 2012
www.ti.com
Table 2-39. VBLK Stop Line Register
Subaddress
24h-25h
Default
015h
Subaddress
7
6
5
4
3
2
1
0
24h
VBLK stop [7:0]
25h
Reserved
VBLK stop [9:8]
VBLK stop [9:0]:
This is an absolute line number.
The TVP5146M2 decoder updates the VBLK stop only when the VBLK stop MSB byte is written to. If the user changes these registers,
the TVP5146M2 decoder retains values in different modes until this decoder resets.
NTSC default: 21 (015h)
PAL default: 23 (017h)
Table 2-40. Embedded Sync Offset Control 1 Register
Subaddress
26h
Default
00h
7
6
5
4
3
2
1
0
Offset [7:0]
This register allows the line position of the embedded F bit and V bit signals to be offset from the 656 standard positions. This register is
only applicable to input video signals with standard number of lines.
0111 1111 = 127 lines
⋮
0000 0001 = 1 line
0000 0000 = 0 line
1111 1111 =
–1 line
⋮
1000 0000 =
–128 lines
Table 2-41. Embedded Sync Offset Control 2 Register
Subaddress
27h
Default
00h
7
6
5
4
3
2
1
0
Offset [7:0]
This register allows the line relationship between the embedded F bit and V bit signals to be offset from the 656 standard positions and
moves F relative to V. This register is only applicable to input video signals with standard number of lines.
0111 1111 = 127 lines
⋮
0000 0001 = 1 line
0000 0000 = 0 line
1111 1111 =
–1 line
⋮
1000 0000 =
–128 lines
52
Functional Description
Copyright
© 2005–2012, Texas Instruments Incorporated
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Product Folder Link(s): TVP5146M2



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