công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

TSC2102IDAR bảng dữ liệu(PDF) 4 Page - Texas Instruments

tên linh kiện TSC2102IDAR
Giải thích chi tiết về linh kiện  PROGRAMMABLE TOUCH SCREEN CONTROLLER WITH INTEGRATED STEREO AUDIO DAC AND HEADPHONE AMPLIFIER
PDF  58 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  TI2 [Texas Instruments]
Trang chủ  https://www.ti.com
Logo TI2 - Texas Instruments

TSC2102IDAR bảng dữ liệu(HTML) 4 Page - Texas Instruments

  TSC2102IDAR Datasheet HTML 1Page - Texas Instruments TSC2102IDAR Datasheet HTML 2Page - Texas Instruments TSC2102IDAR Datasheet HTML 3Page - Texas Instruments TSC2102IDAR Datasheet HTML 4Page - Texas Instruments TSC2102IDAR Datasheet HTML 5Page - Texas Instruments TSC2102IDAR Datasheet HTML 6Page - Texas Instruments TSC2102IDAR Datasheet HTML 7Page - Texas Instruments TSC2102IDAR Datasheet HTML 8Page - Texas Instruments TSC2102IDAR Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 58 page
background image
TSC2102
SLAS379A− APRIL 2003 − REVISED JUNE 2004
www.ti.com
4
ELECTRICAL CHARACTERISTICS (continued)
At +25
°C, AVDD,DRVDD,IOVDD = 3.3 V, DVDD = 1.8 V, Int. Vref = 2.5 V, Fs (Audio) = 48 kHz, unless otherwise noted (continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
DAC LINE OUTPUT
(16−
W driver bypassed)
1020-Hz sine wave input, Fs = 48 ksps,
Load = 10 k
Ω, 10 pF
Full scale output voltage (0 dB)
0.707
Vrms
Output common mode
1.35
V
SNR
Measured as idle channel noise, A-weighted
85
97
dBA
THD
0-dB FS input, 0-dB gain
−97
dB
PSRR
1 kHz, 100mVpp on AVDD(1)
55
dB
DAC HEADPHONE OUTPUT
Load = 16
Ω, 10 pF
SNR
Measured as idle channel noise, A-weighted
85
96
dBA
THD
−1 dBFS input, 0-dB gain
−65
−55
dB
PSRR
1 kHz, 100 mVpp on AVDD(1)
50
dB
Mute attenuation
90
dB
Maximum output power
Per channel
25
mW
Digital volume control
−63.5
0
dB
Digital volume control step size
0.5
dB
Channel separation
Between HPR and HPL
90
dB
VOLTAGE REFERENCE
Voltage range
VREF output programmed as 2.5 V
2.3
2.5
2.7
V
Voltage range
VREF output programmed as 1.25 V
1.15
1.25
1.35
V
Voltage range
External reference
1.2
2.55
V
Reference drift
Internal VREF = 2.5 V
50
ppm/
°C
Current drain
Extra current drawn when the internal
reference is turned on.
500
µA
DIGITAL INPUT / OUTPUT
Internal clock frequency
8
MHz
Logic family
CMOS
Logic level:
VIH
IIH = +5 µA
0.7xIOVDD
V
VIL
IIL = +5 µA
−0.3
0.3xIOVDD
V
VOH
IOH = 2 TTL loads
0.8xIOVDD
V
VOL
IOL = 2 TTL loads
0.1xIOVDD
V
Capacitive load
10
pF



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com