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TPS2104DBVT bảng dữ liệu(PDF) 13 Page - Texas Instruments |
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TPS2104DBVT bảng dữ liệu(HTML) 13 Page - Texas Instruments |
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13 / 21 page ![]() TPS2104, TPS2105 VAUX POWER-DISTRIBUTION SWITCHES SLVS235A – SEPTEMBER 1999 – REVISED APRIL 2000 13 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 APPLICATION INFORMATION power supply considerations (continued) switch transition The n-channel MOSFET on IN1 uses a charge pump to create the gate-drive voltage, which gives the IN1 switch a rise time of approximately 0.4 ms. The p-channel MOSFET on IN2 has a simpler drive circuit that allows a rise time of approximately 4 µs. Because the device has two switches and a single enable pin, these rise times are seen as transition times, from IN1 to IN2, or IN2 to IN1, by the output. The controlled transition times help limit the surge currents seen by the power supply during switching. thermal protection Thermal protection provided on the IN1 switch prevents damage to the IC when heavy-overload or short-circuit faults are present for extended periods of time. The increased dissipation causes the junction temperature to rise to dangerously high levels. The protection circuit senses the junction temperature of the switch and shuts it off at approximately 145 °C (TJ). The switch remains off until the junction temperature has dropped approximately 10 °C. The switch continues to cycle in this manner until the load fault or input power is removed. undervoltage lockout An undervoltage lockout function is provided to ensure that the power switch is in the off state at power up. Whenever the input voltage falls below approximately 2 V, the power switch quickly turns off. This function facilitates the design of hot-insertion systems that may not have the capability to turn off the power switch before input power is removed. Upon reinsertion, the power switch will be turned on with a controlled rise time to reduce EMI and voltage overshoots. power dissipation and junction temperature The low on-resistance on the n-channel MOSFET allows small surface-mount packages, such as SOIC, to pass large currents. The thermal resistances of these packages are high compared to those of power packages; it is good design practice to check power dissipation and junction temperature. First, find ron at the input voltage and operating temperature. As an initial estimate, use the highest operating ambient temperature of interest and read ron from Figure 17 or Figure 18. Next calculate the power dissipation using: P D + ron I2 Finally, calculate the junction temperature: T J + P D RqJA ) TA Where: TA = Ambient temperature RθJA = Thermal resistance Compare the calculated junction temperature with the initial estimate. If they do not agree within a few degrees, repeat the calculation using the calculated value as the new estimate. Two or three iterations are generally sufficient to obtain a reasonable answer. ESD protection All TPS2104 and TPS2105 terminals incorporate ESD-protection circuitry designed to withstand a 2-kV human-body-model, 750-V CDM, and 200-V machine-model discharge as defined in MIL-STD-883C. |
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