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IP1000A LF
Preliminary Data Sheet
61/75
July 5, 2005
Copyright © 2005, IC Plus Corp.
IP1000A LF-DS-R08
3.2.3
EEPROM Fields
Table 3-4 summarizes the layout of the data stored in an EEPROM connected to the IP1000A LF. Most
defined EEPROM fields are read from the EEPROM and loaded into unique register bit positions within
the IP1000A LF during auto initialization.
In Table 3-4, all locations marked “Unused” and all locations not shown are not utilized by the IP1000A
LF.
Table 3-4 : IP1000A LF EEPROM Field Layout
16 BIT WORD
ADDR OFFSET
StationAddress
12
StationAddress
11
StationAddress
10
Unused
F
Unused
E
Unused
D
Unused
C
Unused
B
Unused
A
Unused
9
Unused
8
Unused
7
LEDMode
6
PCI Register I/O, Mem Base[31:16]
5
PCI Register I/O, I/O, Mem Base[15:8]
4
SubsystemId
3
SubsystemVendorId
2
AsicCtrl
1
ConfigParm
0
3.2.3.1
ConfigParm
Class............................. EEPROM Fields
I/O Base Address ......... 0x00, accessed via the EepromCtrl register
Address Offset .............. 0x00
Access Rule.................. Word
Width ............................ 16 bits
Bit
BIT Name
BIT Description
0
FastBackToBack
Fast Back to Back. FastBackToBack corresponds to the
FastBackTo-Back bit of the ConfigStatus register.
1
Lower1Meg
Lower 1 Megabyte. Lower1Meg corresponds to bit 1 of the MemMap-Type
field in the MemBaseAddress register.
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