T – Temperature – °C

A

0

25

50

75

100

0

0.2

0.4

0.6

0.8

1

VDD

H+

AL

H-

A2

A1

LD

GND

TMP821

>1uF

TMP821

www.ti.com

SLDS152A – JANUARY 2008 – REVISED MAY 2015

9 Power Supply Recommendations

Connect a bulk capacitor of 1 µF or greater to VDD and GND. The maximum voltage applied must be less than

30 V.

10 Layout

10.1 Layout Guidelines

A bulk capacitor at the VDD and GND LD capacitor can be connected near the device as shown in Figure 9.

10.2 Layout Example

Figure 9. Recommended Layout Example

10.3 Power Dissipation

Figure 10 shows allowable power dissipation versus ambient temperature.

Figure 10. Power Dissipation

Use Equation 3 to calculate total power consumption.

Ptotal = PC1 + PC2 + PC3

where

•

PC1 = circuit power dissipation

•

PC1 = VCC × ICC

•

PC2 = output power dissipation

•

PC2 = (VCC – VOH) × IO

•

VOH = A1 and A2 high-level voltage

•

PC2 can be reduced by increasing the external output transistor's hFE rank to reduce the IO consumption.

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